ATmega6450P Atmel Corporation, ATmega6450P Datasheet - Page 287

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ATmega6450P

Manufacturer Part Number
ATmega6450P
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATmega6450P

Flash (kbytes)
64 Kbytes
Pin Count
100
Max. Operating Frequency
20 MHz
Cpu
8-bit AVR
Hardware Qtouch Acquisition
No
Max I/o Pins
69
Ext Interrupts
25
Usb Speed
No
Usb Interface
No
Spi
2
Twi (i2c)
1
Uart
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8 to 5.5
Operating Voltage (vcc)
1.8 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
3
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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27.6
27.6.1
8285D–AVR–06/11
Parallel Programming Parameters, Pin Mapping, and Commands
Signal Names
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
This section describes how to parallel program and verify Flash Program memory, EEPROM
D a t a
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P. Pulses are
assumed to be at least 250 ns unless otherwise noted.
I n t h i s s e c t i o n , s o m e p i n s o f t h e
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P are referenced by
signal names describing their functionality during parallel programming, see
Table
The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a positive pulse.
The bit coding is shown in
When pulsing WR or OE, the command loaded determines the action executed. The different
Commands are shown in
Figure 27-1. Parallel Programming
Table 27-9.
Programming Mode
Signal Name in
27-9. Pins not described in the following table are referenced by pin names.
RDY/BSY
BS1
XA0
XA1
WR
OE
m e m o r y ,
Pin Name Mapping
Pin Name
M e m o r y
RDY/BSY
Table
PD1
PD2
PD3
PD4
PD5
PD6
Table
PAGEL
+12 V
BS2
BS1
XA0
XA1
WR
OE
27-12.
27-11.
I/O
O
I
I
I
I
I
L o c k
PD1
PD2
PD3
PD4
PD5
PD6
PD7
RESET
XTAL1
GND
PA0
Function
0: Device is busy programming, 1: Device is ready for new
command
Output Enable (Active low)
Write Pulse (Active low).
Byte Select 1 (“0” selects low byte, “1” selects high byte)
XTAL Action Bit 0
XTAL Action Bit 1
b i t s ,
PB7 - PB0
AVCC
VCC
a n d
+5V
+5V
DATA
F u s e
b i t s
Figure 27-1
i n
and
287
t h e

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