ATmega6450P Atmel Corporation, ATmega6450P Datasheet - Page 56

• Manufacturer Part Number: ATmega6450P
• Manufacturer: Atmel Corporation

Specifications of ATmega6450P

• Flash (kbytes): 64 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 20 MHz
• Cpu: 8-bit AVR
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 69
• Ext Interrupts: 25
• Usb Speed: No
• Usb Interface: No
• Spi: 2
• Twi (i2c): 1
• Uart: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: Yes
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 1.8 to 5.5
• Operating Voltage (vcc): 1.8 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

8285D–AVR–06/11
ATmega165A/PA/325A/PA/3250A/PA/645A/P/6450A/P
Table 12-2 on page 56
tions of BOOTRST and IVSEL settings. If the program never enables an interrupt source, the
Interrupt Vectors are not used, and regular program code can be placed at these locations.
This is also the case if the Reset Vector is in the Application section while the Interrupt Vectors
are in the Boot section or vice versa.
Table 12-2.
Note:
The most typical and general program setup for the Reset and Interrupt Vector Addresses in
ATmega165A/165PA is:
BOOTRST
Address Labels Code
0x0000
0x0002
0x0004
0x0006
0x0008
0x000A
0x000C
0x000E
0x0010
0x0012
0x0014
0x0016
0x0018
0x001A
0x001C
0x001E
0x0020
0x0022
0x0024
0x0026
0x0028
0x002A
;
0x002E
0x002F
0x0030
1
1
0
0
2. When the IVSEL bit in MCUCR is set, Interrupt Vectors will be moved to the start of the Boot
1. The Boot Reset Address is shown in
Flash Section. The address of each Interrupt Vector will then be the address in this table
added to the start address of the Boot Flash Section.
means unprogrammed while “0” means programmed.
RESET: ldi
Reset and Interrupt Vectors Placement
IVSEL
0
1
0
1
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
jmp
out
ldi
shows reset and Interrupt Vectors placement for the various combina-
Reset Address
0x0000
0x0000
Boot Reset Address
Boot Reset Address
RESET
EXT_INT0
PCINT0
PCINT1
TIM2_COMP
TIM2_OVF
TIM1_CAPT
TIM1_COMPA
TIM1_COMPB
TIM1_OVF
TIM0_COMP
TIM0_OVF
SPI_STC
USART_RXCn
USART_DRE
USART_TXCn
USI_STRT
USI_OVFL
ANA_COMP
ADC
EE_RDY
SPM_RDY
r16, high(RAMEND); Main program start
SPH,r16
r16, low(RAMEND)
Table 26-6 on page
Comments
; Reset Handler
; IRQ0 Handler
; PCINT0 Handler
; PCINT0 Handler
; Timer2 Compare Handler
; Timer2 Overflow Handler
; Timer1 Capture Handler
; Timer1 CompareA Handler
; Timer1 CompareB Handler
; Timer1 Overflow Handler
; Timer0 Compare Handler
; Timer0 Overflow Handler
; SPI Transfer Complete Handler
; USART0 RX Complete Handler
; USART0,UDRn Empty Handler
; USART0 TX Complete Handler
; USI Start Condition Handler
; USI Overflow Handler
; Analog Comparator Handler
; ADC Conversion Complete Handler
; EEPROM Ready Handler
; SPM Ready Handler
Set Stack Pointer to top of RAM
(1)
0x0002
Interrupt Vectors Start Address
Boot Reset Address + 0x0002
0x0002
Boot Reset Address + 0x0002
278. For the BOOTRST Fuse “1”
56