ATmega64C1 Automotive Atmel Corporation, ATmega64C1 Automotive Datasheet - Page 154

• Manufacturer Part Number: ATmega64C1 Automotive
• Manufacturer: Atmel Corporation

Specifications of ATmega64C1 Automotive

• Flash (kbytes): 64 Kbytes
• Pin Count: 32
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 12
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 27
• Ext Interrupts: 27
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Uart: 1
• Can: 1
• Lin: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 11
• Adc Resolution (bits): 10
• Adc Speed (ksps): 125
• Analog Comparators: 4
• Resistive Touch Screen: No
• Dac Channels: 1
• Dac Resolution (bits): 10
• Temp. Sensor: Yes
• Crypto Engine: No
• Sram (kbytes): 4
• Eeprom (bytes): 2048
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 150
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 2
• Output Compare Channels: 4
• Input Capture Channels: 1
• Pwm Channels: 4
• 32khz Rtc: No
• Calibrated Rc Oscillator: Yes

14.16.8
154
Atmel ATmega16/32/64/M1/C1
PSC Control Register – PCTL
• Bit 4 – PMODE PSC Mode
Select the mode of PSC.
Table 14-10. PSC Mode Selection
• Bit 3 – POPB: PSC B Output Polarity
If this bit is cleared, the PSC outputs B are active Low.
If this bit is set, the PSC outputs B are active High.
• Bit 2 – POPA: PSC A Output Polarity
If this bit is cleared, the PSC outputs A are active Low.
If this bit is set, the PSC outputs A are active High.
• Bit 1:0 – not use
not use
• Bit 7:6 – PPRE1:0 : PSC Prescaler Select
This two bits select the PSC input clock division factor. All generated waveform will be modi-
fied by this factor.
Table 14-11. PSC Prescaler Selection
• Bit 5 – PCLKSEL: PSC Input Clock Select
This bit is used to select between CLK
Set this bit to select the fast clock input (CLK
Clear this bit to select the slow clock input (CLK
Bit
Read/Write
Initial Value
PMODE
0
1
PPRE1
0
0
1
1
PPRE0
0
1
0
1
PPRE1
R/W
7
0
Description
One Ramp Mode (Edge Aligned)
Center Aligned Mode
PPRE0
R/W
6
0
Description
No divider on PSC input clock
Divide the PSC input clock by 4
Divide the PSC input clock by 32
Divide the PSC clock by 256
PCLKSEL
R/W
5
0
PLL
SWAP2
or CLK
R/W
4
0
PLL
).
IO
IO
).
SWAP1
clocks.
R/W
3
0
SWAP0
R/W
2
0
PCCYC
R/W
1
0
PRUN
R/W
0
0
7647G–AVR–09/11
PCTL