ATmega64C1 Automotive Atmel Corporation, ATmega64C1 Automotive Datasheet - Page 248

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ATmega64C1 Automotive

Manufacturer Part Number
ATmega64C1 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega64C1 Automotive

Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
248
Atmel ATmega16/32/64/M1/C1
• Bit 6 – ISRCEN: Current Source Enable
Set this bit to source a 100µA current to the AREF pin.
Clear this bit to use AREF pin as Analog Reference pin.
• Bit 5 – AREFEN: Analog Reference pin Enable
Set this bit to connect the internal AREF circuit to the AREF pin.
Clear this bit to disconnect the internal AREF circuit from the AREF pin.
• Bit 4 – Res: Reserved Bit
This bit is unused bit in the ATmega16/32/64/M1/C1, and will always read as zero.
• Bit 3, 2, 1, 0– ADTS3:ADTS0: ADC Auto Trigger Source Selection Bits
These bits are only necessary in case the ADC works in auto trigger mode. It means if ADATE
bit in ADCSRA register is set.
In accordance with the Table 18-7, these 3 bits select the interrupt event which will generate
the trigger of the start of conversion. The start of conversion will be generated by the rising
edge of the selected interrupt flag whether the interrupt is enabled or not. In case of trig on
PSCnASY event, there is no flag. So in this case a conversion will start each time the trig
event appears and the previous conversion is completed..
Table 18-7.
ADTS3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
ADC Auto Trigger Source Selection
ADTS2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
ADTS1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
ADTS0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Description
Free Running Mode
External Interrupt Request 0
Timer/Counter0 Compare Match
Timer/Counter0 Overflow
Timer/Counter1 Compare Match B
Timer/Counter1 Overflow
Timer/Counter1 Capture Event
PSC Module 0 Synchronization Signal
PSC Module 1 Synchronization Signal
PSC Module 2 Synchronization Signal
Analog comparator 0
Analog comparator 1
Analog comparator 2
Analog comparator 3
Reserved
Reserved
7647G–AVR–09/11

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