ATmega64C1 Automotive Atmel Corporation, ATmega64C1 Automotive Datasheet - Page 62

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ATmega64C1 Automotive

Manufacturer Part Number
ATmega64C1 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of ATmega64C1 Automotive

Flash (kbytes)
64 Kbytes
Pin Count
32
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
12
Hardware Qtouch Acquisition
No
Max I/o Pins
27
Ext Interrupts
27
Usb Speed
No
Usb Interface
No
Spi
1
Uart
1
Can
1
Lin
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
11
Adc Resolution (bits)
10
Adc Speed (ksps)
125
Analog Comparators
4
Resistive Touch Screen
No
Dac Channels
1
Dac Resolution (bits)
10
Temp. Sensor
Yes
Crypto Engine
No
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 150
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
4
Input Capture Channels
1
Pwm Channels
4
32khz Rtc
No
Calibrated Rc Oscillator
Yes
9. I/O-Ports
9.1
62
Introduction
Atmel ATmega16/32/64/M1/C1
All AVR ports have true Read-Modify-Write functionality when used as general digital I/O
ports. This means that the direction of one port pin can be changed without unintentionally
changing the direction of any other pin with the SBI and CBI instructions. The same applies
when changing drive value (if configured as output) or enabling/disabling of pull-up resistors (if
configured as input). Each output buffer has symmetrical drive characteristics with both high
sink and source capability. All port pins have individually selectable pull-up resistors with a
supply-voltage invariant resistance. All I/O pins have protection diodes to both V
Ground as indicated in
plete list of parameters.
Figure 9-1.
All registers and bit references in this section are written in general form. A lower case “x” rep-
resents the numbering letter for the port, and a lower case “n” represents the bit number.
However, when using the register or bit defines in a program, the precise form must be used.
For example, PORTB3 for bit no. 3 in Port B, here documented generally as PORTxn. The
physical I/O Registers and bit locations are listed in “Register Description for I/O-Ports”.
Three I/O memory address locations are allocated for each port, one each for the Data Regis-
ter – PORTx, Data Direction Register – DDRx, and the Port Input Pins – PINx. The Port Input
Pins I/O location is read only, while the Data Register and the Data Direction Register are
read/write. However, writing a logic one to a bit in the PINx Register, will result in a toggle in
the corresponding bit in the Data Register. In addition, the Pull-up Disable – PUD bit in
MCUCR disables the pull-up function for all pins in all ports when set.
Using the I/O port as General Digital I/O is described in “Ports as General Digital I/O”. Most
port pins are multiplexed with alternate functions for the peripheral features on the device.
How each alternate function interferes with the port pin is described in
tions” on page
functions.
Note that enabling the alternate function of some of the port pins does not affect the use of the
other pins in the port as general digital I/O.
I/O Pin Equivalent Schematic
67. Refer to the individual module sections for a full description of the alternate
Pxn
Figure
9-1. Refer to
C
pin
“Electrical Characteristics” on page 317
"General Digital I/O" for
See Figure
R
Details
pu
Logic
“Alternate Port Func-
7647G–AVR–09/11
for a com-
CC
and

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