ATxmega64B3 Atmel Corporation, ATxmega64B3 Datasheet - Page 146

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ATxmega64B3

Manufacturer Part Number
ATxmega64B3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64B3

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Manufacturer
Quantity
Price
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Manufacturer:
Atmel
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Manufacturer:
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12.14.5
8291A–AVR–10/11
EVCTRL – Event Control Register
Table 12-7 on page 146
Table 12-7.
• Bits 3:2 – CLKOUTSEL[1:0] : Clock Output Select
These bits are used to select which of the peripheral clocks will be output to the port pin if CLK-
OUT is configured.
Table 12-8.
• Bit 1:0 – CLKOUT[1:0]: Clock Output Port
These bits decide which port the peripheral clock will be output to. Pin 7 on the selected port is
the default used. The CLKOUT setting will override the EVOUT setting. Thus, if both are
enabled on the same port pin, the peripheral clock will be visible. The port pin must be config-
ured as output for the clock to be available on the pin.
Table 12-9 on page 146
Table 12-9.
• Bit 7:2 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
Bit
+0x06
Read/Write
Initial Value
CLKOUT[1:0]
00
01
10
11
CLKOUTSEL[1:0]
EVOUT[1:0]
00
01
10
11
00
01
10
11
R
7
0
Event output pin selection.
Event output clock selection.
Clock output port configurations.
R
6
0
shows the possible configurations.
shows the possible configurations.
Group Configuration
OFF
PC
PE
Group Configuration
Group Configuration
CLK1X
CLK2X
CLK4X
R
5
0
OFF
PC
PE
R
4
0
Description
Event output disabled
Event channel 0 output on PORTC
Reserved for future use
Event channel 0 output on PORTE
Description
CLK
CLK
CLK
Reserved
Description
Clock output disabled
Clock output on PORTC
Reserved for future use
Clock output on PORTE
R
3
0
PER
PER2
PER4
Atmel AVR XMEGA B
output to pin
output to pin
output to pin
R
2
0
R/W
EVOUTSEL[1:0]
1
0
R/W
0
0
EVCTRL
146

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