ATxmega64B3 Atmel Corporation, ATxmega64B3 Datasheet - Page 207

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ATxmega64B3

Manufacturer Part Number
ATxmega64B3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64B3

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATxmega64B3-AU
Manufacturer:
Atmel
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10 000
Part Number:
ATxmega64B3-AUR
Manufacturer:
Atmel
Quantity:
10 000
17.3.7
17.3.8
17.3.9
8291A–AVR–10/11
CNTH – Counter Register High
PERL – Period Register Low
PERH – Period Register High
• Bit 7:0 - CNT[7:0]: Counter Value Low
These bits hold the LSB of the 16-bit real-time counter value.
• Bit 7:0 – CNT[15:8]: Counter Value High
These bits hold the MSB of the 16-bit real-time counter value.
The PERH and PERL register pair represents the 16-bit value, PER. PER is constantly com-
pared with the counter value (CNT). A match will set OVFIF in the INTFLAGS register and clear
CNT. Reading and writing 16-bit values requires special attention. Refer to
Registers” on page 12
Due to synchronization between the RTC clock and system clock domains, there is a latency of
two RTC clock cycles from updating the register until this has an effect. Application software
needs to check that the SYNCBUSY flag in the
cleared before writing to this register.
• Bit 7:0 – PER[7:0]: Period Low
These bits hold the LSB of the 16-bit RTC TOP value.
• Bits 7:0 – PER[15:8]: Period High
These bits hold the MSB of the 16-bit RTC TOP value.
Bit
+0x09
Read/Write
Initial Value
Bit
+0x0B
Read/Write
Initial Value
Bit
+0x0A
Read/Write
Initial Value
R/W
R/W
R/W
7
0
7
1
7
1
R/W
for details.
R/W
R/W
6
0
6
1
6
1
R/W
R/W
R/W
5
0
5
1
5
1
R/W
R/W
R/W
4
0
4
1
4
1
CNT[15:8]
PER[15:8]
PER[7:0]
”STATUS – Status register” on page 205
R/W
R/W
R/W
3
0
3
1
3
1
Atmel AVR XMEGA B
R/W
R/W
R/W
2
0
2
1
2
1
R/W
R/W
R/W
1
0
1
1
1
1
”Accessing 16-bit
R/W
R/W
R/W
0
0
0
1
0
1
CNTH
PERL
PERH
207
is

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