ATxmega64B3 Atmel Corporation, ATxmega64B3 Datasheet - Page 346

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ATxmega64B3

Manufacturer Part Number
ATxmega64B3
Description
Manufacturer
Atmel Corporation
Datasheets

Specifications of ATxmega64B3

Flash (kbytes)
64 Kbytes
Pin Count
64
Max. Operating Frequency
32 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
36
Ext Interrupts
36
Usb Transceiver
1
Usb Speed
Full Speed
Usb Interface
Device
Spi
2
Twi (i2c)
1
Uart
1
Segment Lcd
100
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
12
Adc Speed (ksps)
2000
Analog Comparators
2
Resistive Touch Screen
No
Temp. Sensor
Yes
Crypto Engine
AES/DES
Sram (kbytes)
4
Eeprom (bytes)
2048
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
Yes
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.6 to 3.6
Operating Voltage (vcc)
1.6 to 3.6
Fpu
No
Mpu / Mmu
no / no
Timers
2
Output Compare Channels
6
Input Capture Channels
6
Pwm Channels
6
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes

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25.16.4
25.16.5
8291A–AVR–10/11
INTFLAGS – Interrupt Flag registers
RESH – Result register High
Table 25-14. ADC interrupt mode.
• Bits 1:0 – INTLVL[1:0]: Interrupt Priority Level and Enable
These bits enable the ADC channel interrupt and select the interrupt level, as described in
rupts and Programmable Multilevel Interrupt Controller” on page
be triggered for conditions when the IF bit in the INTFLAGS register is set.
• Bit 7:1 – Reserved
These bits are unused and reserved for future use. For compatibility with future devices, always
write these bits to zero when this register is written.
• Bit 0 – IF: Interrupt Flag
The interrupt flag is set when the ADC conversion is complete. If the channel is configured for
compare mode, the flag will be set if the compare condition is met. IF is automatically cleared
when the ADC channel interrupt vector is executed. The bit can also be cleared by writing a one
to the bit location.
For all result registers and with any ADC result resolution, a signed number is represented in 2’s
complement form, and the msb represents the sign bit.
The RESL and RESH register pair represents the 16-bit value, ADCRESULT. Reading and writ-
ing 16-bit values require special attention. Refer to
details.
Bit
+0x03
Read/Write
Initial Value
12-bit, left.
12-bit, right
8-bit
INTMODE[1:0]
00
01
10
11
Bit
+0x05
Read/Write
Initial Value
R
7
0
COMPLETE
BELOW
ABOVE
Group Configuration
R
6
0
R
7
0
R
0
5
R
6
0
R
4
0
R
5
0
Interrupt Mode
Conversion complete
Compare result below threshold
Reserved
Compare result above threshold
”Accessing 16-bit Registers” on page 11
R
3
0
R
4
0
Atmel AVR XMEGA B
RES[11:4]
R
2
0
R
3
0
101. The enabled interrupt will
R
1
0
R
2
0
RES[11:8]
R/W
IF
0
0
R
1
0
INTFLAGS
”Inter-
R
0
0
346
for

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