SAM3U4E Atmel Corporation, SAM3U4E Datasheet - Page 113
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SAM3U4E
Manufacturer Part Number
SAM3U4E
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U4E
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
50
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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13.11.7
13.11.7.1
13.11.7.2
13.11.7.3
13.11.7.4
13.11.7.5
6430E–ATARM–29-Aug-11
PUSH
PUSH
POP
PUSH and POP
Syntax
Operation
Restrictions
Condition flags
Examples
{R0,R4-R7}
{R2,LR}
{R0,R10,PC}
Push registers onto, and pop registers off a full-descending stack.
where:
cond
reglist
It must be comma separated if it contains more than one register or register range.
PUSH and POP are synonyms for STMDB and LDM (or LDMIA) with the memory addresses for
the access based on SP, and with the final address for the access written back to the SP. PUSH
and POP are the preferred mnemonics in these cases.
PUSH stores registers on the stack in order of decreasing the register numbers, with the highest
numbered register using the highest memory address and the lowest numbered register using
the lowest memory address.
POP loads registers from the stack in order of increasing register numbers, with the lowest num-
bered register using the lowest memory address and the highest numbered register using the
highest memory address.
See
In these instructions:
When PC is in reglist in a POP instruction:
These instructions do not change the flags.
• reglist must not contain SP
• for the PUSH instruction, reglist must not contain PC
• for the POP instruction, reglist must not contain PC if it contains LR.
• bit[0] of the value loaded to the PC must be 1 for correct execution, and a branch occurs to
• if the instruction is conditional, it must be the last instruction in the IT block.
this halfword-aligned address
PUSH{cond} reglist
POP{cond} reglist
“LDM and STM” on page 111
is an optional condition code, see
is a non-empty list of registers, enclosed in braces. It can contain register ranges.
for more information.
“Conditional execution” on page
SAM3U Series
98.
113
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