SAM3U4E Atmel Corporation, SAM3U4E Datasheet - Page 397
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SAM3U4E
Manufacturer Part Number
SAM3U4E
Description
Manufacturer
Atmel Corporation
Specifications of SAM3U4E
Flash (kbytes)
256 Kbytes
Pin Count
144
Max. Operating Frequency
96 MHz
Cpu
Cortex-M3
# Of Touch Channels
57
Hardware Qtouch Acquisition
No
Max I/o Pins
96
Ext Interrupts
96
Usb Transceiver
1
Quadrature Decoder Channels
1
Usb Speed
Hi-Speed
Usb Interface
Device
Spi
5
Twi (i2c)
2
Uart
5
Ssc
1
Sd / Emmc
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
16
Adc Resolution (bits)
12
Adc Speed (ksps)
384
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
50
Self Program Memory
YES
External Bus Interface
1
Dram Memory
No
Nand Interface
Yes
Picopower
No
Temp. Range (deg C)
-40 to 85
I/o Supply Class
1.8/3.3
Operating Voltage (vcc)
1.62 to 3.6
Fpu
No
Mpu / Mmu
Yes / No
Timers
3
Output Compare Channels
3
Input Capture Channels
3
Pwm Channels
4
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
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Figure 25-39. Parity Generation for 512/1024/2048/4096 8-bit Words
6430E–ATARM–29-Aug-11
6430E–ATARM–29-Aug-11
(page size -1 )th byte
(page size -3 )th byte
(page size -2 )th byte
Page size th byte
Page size = 512 Px = 2048
Page size = 1024 Px = 4096
Page size = 2048 Px = 8192
Page size = 4096 Px = 16384
4 th byte
2nd byte
3rd byte
1st byte
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
Bit7
P1
ECC Status Registers, ECC Parity Registers are cleared when a read/write command is
detected or a software reset is performed.
For Single-bit Error Correction and Double-bit Error Detection (SEC-DED) Hsiao code is used.
24-bit ECC is generated in order to perform one bit correction per 256 or 512 bytes for pages of
512/2048/4096 8-bit words. 32-bit ECC is generated in order to perform one bit correction per
512/1024/2048/4096 8- or 16-bit words. They are generated according to the schemes shown in
Figure 25-39
To calculate P8’ to PX’ and P8 to PX, apply the algorithm that follows.
• ECC error: The ECCERR flag in the ECC Status Registers (ECC_SR1/ECC_SR2) is set. An
• Non correctable error: The MULERR flag in the ECC Status Registers
P2
error has been detected in the ECC code stored in the Flash memory. The position of the
corrupted bit can be found by the application performing an XOR between the Parity and the
NParity contained in the ECC code stored in the Flash memory.
(ECC_SR1/ECC_SR2) is set. Several unrecoverable errors have been detected in the Flash
memory page.
Page size = 2
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
Bit6
P1'
for i =0 to n
P4
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
Bit5
P1
and
P2'
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
Bit4
Figure
P1'
n
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
Bit3
25-40.
P1
P2
P1=bit7(+)bit5(+)bit3(+)bit1(+)P1
P2=bit7(+)bit6(+)bit3(+)bit2(+)P2
P4=bit7(+)bit6(+)bit5(+)bit4(+)P4
P1'=bit6(+)bit4(+)bit2(+)bit0(+)P1'
P2'=bit5(+)bit4(+)bit1(+)bit0(+)P2'
P4'=bit7(+)bit6(+)bit5(+)bit4(+)P4'
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
Bit2
P1'
P4'
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
Bit1
P1
P2'
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
Bit0
P1'
P8
P8'
P8
P8'
P8
P8'
P8
P8'
P16'
P16'
P16
P16
P32
P32
P32
SAM3U Series
SAM3U Series
PX
PX'
397
397
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