SAM7X256 Atmel Corporation, SAM7X256 Datasheet - Page 678

• Manufacturer Part Number: SAM7X256
• Manufacturer: Atmel Corporation

Specifications of SAM7X256

• Flash (kbytes): 256 Kbytes
• Pin Count: 100
• Max. Operating Frequency: 55 MHz
• Cpu: ARM7TDMI
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 62
• Ext Interrupts: 62
• Usb Transceiver: 1
• Usb Speed: Full Speed
• Usb Interface: Device
• Spi: 2
• Twi (i2c): 1
• Uart: 3
• Can: 1
• Ssc: 1
• Ethernet: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 384
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 64
• Self Program Memory: NO
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 85
• I/o Supply Class: 3.3
• Operating Voltage (vcc): 3.0 to 3.6
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 3
• Output Compare Channels: 3
• Input Capture Channels: 3
• Pwm Channels: 4
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: No

682
Version
6120E
6120D
6120C
6120B
6120A
SAM7X512/256/128
Comments
04-Apr-06
The following errata have been added:
Section 41.3.3.2 ”EMAC: Possible Event Loss when Reading EMAC_ISR”
Section 41.3.3.3 ”EMAC: Possible Event Loss when Reading the Statistics Register Block”
Section 41.3.7.3 ”SPI: SPCK Behavior in Master Mode”
Section 41.3.4.1 ”PIO: Leakage on PB27 -
03-Feb-06
Section 41. ”SAM7X512/256/128 Errata”
Device package/product number changed
Section 41.3.3 ”Ethernet MAC (EMAC)”
The sections listed below have been added to the Errata:
Section 41.3.5 ”Pulse Width Modulation Controller (PWM)”
Section 41.3.7 ”Serial Peripheral Interface (SPI)”
Section 41.3.8 ”Synchronous Serial Controller (SSC)”
Section 41.3.9 ”Two-wire Interface (TWI)”
Section 41.3.10 ”Universal Synchronous Asynchronous Receiver Transmitter (USART)”
26-Oct-05
Replaced
17-Oct-05
Updated product functionalities in
on page
Corrected PLL output range maximum value in
Section 18.3.2.1 “Internal Memory Mapping” on page 95
Characteristics,” on page
Updated information in Power Supplies on page 9
Updated field Part Number in
Updated Chip ID in
Removed references to PGMEN2 in
Updated “ARCH: Architecture Identifier” in Debug Unit with new values for AT91SAM7XCxx series and
AT91SAM7Xxx series.
Updated CAN bit timing configuration in
and in
Added
Updated AT91SAM7X Ordering information.
10-Oct-05
Section 36.8.6 “CAN Baudrate Register” on page
Section 38.8.4 “EMAC Characteristics” on page
28, and Figure 11-1 on page 27
Section 29. “Two-wire Interface (TWI)” on page
Section 9.5 “Debug Unit” on page 28
617.
Section 12.5.5 “ID Code Register” on page
“Features” on page
Section 20. “Fast Flash Programming Interface (FFPI)” on page
RMII mode is not functional
Section 36.6.4.1 “CAN Bit Timing Configuration” on page 510
PB30”: worst case leakage changed to 9 µA
Section 9.2 “Clock Generator” on page
1,
624.
Figure 2-1 on page
543.
and
and in
281.
Table 38-12, “Phase Lock Loop
Section 12.5.3 “Debug Unit” on page
55.
4,
Section 9.5 “Debug Unit”
26,
Figure 18-3
119.
6120I–ATARM–06-Apr-11
48.
in
Change
Request
Ref.
#2455
#2605
#1767
05-516
05-456
05-491
05-472
05-464
05-459
05-419
05-469
05-470
First issue