SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 34

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SAM3N0C

Manufacturer Part Number
SAM3N0C
Description
Manufacturer
Atmel Corporation
Datasheets
9.2
9.3
34
APB/AHB Bridge
Peripheral Signal Multiplexing on I/O Lines
SAM3N
The SAM3N4/2/1 product embeds one peripheral bridge:
The peripherals of the bridge are clocked by MCK.
The SAM3N product features 2 PIO controllers (48-pin and 64-pin version) or 3 PIO controllers
(100-pin version), PIOA, PIOB and PIOC, that multiplex the I/O lines of the peripheral set.
The SAM3N 64-pin and 100-pin PIO Controller controls up to 32 lines (see
ing on PIO Controller A (PIOA),” on page
peripheral functions: A, B or C. The multiplexing tables in the following paragraphs define how
the I/O lines of the peripherals A, B and C are multiplexed on the PIO Controllers. The column
“Comments” has been inserted in this table for the user’s own comments; it may be used to track
how pins are defined in an application.
Note that some peripheral functions which are output only, might be duplicated within the tables.
35). Each line can be assigned to one of three
Table 9-2, “Multiplex-
11011A–ATARM–04-Oct-10

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