SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 605

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SAM3N0C

Manufacturer Part Number
SAM3N0C
Description
Manufacturer
Atmel Corporation
Datasheets
31.7.2
Name:
Addresses:
Access:
This register can only be written if the WPEN bit is cleared in
• TC0XC0S: External Clock Signal 0 Selection
• TC1XC1S: External Clock Signal 1 Selection
• TC2XC2S: External Clock Signal 2 Selection
• QDEN: Quadrature Decoder ENabled
0 = disabled.
1 = enables the quadrature decoder logic (filter, edge detection and quadrature decoding).
quadrature decoding (direction change) can be disabled using QDTRANS bit.
One of the POSEN or SPEEDEN bits must be also enabled.
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
Value
Value
Value
INVIDX
0
1
2
3
0
1
2
3
0
1
2
3
31
23
15
7
TC Block Mode Register
Name
TCLK0
TIOA1
TIOA2
Name
TCLK1
TIOA0
TIOA2
Name
TCLK2
TIOA1
TIOA2
INVB
30
22
14
TC_BMR
0x400100C4 (0), 0x400140C4 (1)
Read-write
6
MAXFILT
Description
Signal connected to XC0: TCLK0
Reserved
Signal connected to XC0: TIOA1
Signal connected to XC0: TIOA2
Description
Signal connected to XC1: TCLK1
Reserved
Signal connected to XC1: TIOA0
Signal connected to XC1: TIOA2
Description
Signal connected to XC2: TCLK2
Reserved
Signal connected to XC2: TIOA1
Signal connected to XC2: TIOA2
INVA
29
21
13
5
TC2XC2S
EDGPHA
28
20
12
4
“TC Write Protect Mode Register” on page
QDTRANS
FILTER
27
19
11
3
TC1XC1S
SPEEDEN
26
18
10
2
IDXPHB
POSEN
25
17
9
1
TC0XC0S
MAXFILT
612.
SAM3N
SAM3N
SWAP
QDEN
24
16
8
0
605
605

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