SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 454

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SAM3N0C

Manufacturer Part Number
SAM3N0C
Description
Manufacturer
Atmel Corporation
Datasheets
• TXBUFE: TX Buffer Empty
0 = SPI_TCR
1 = Both SPI_TCR
• NSSR: NSS Rising
0 = No rising edge detected on NSS pin since last read.
1 = A rising edge occurred on NSS pin since last read.
• TXEMPTY: Transmission Registers Empty
0 = As soon as data is written in SPI_TDR.
1 = SPI_TDR and internal shifter are empty. If a transfer delay has been defined, TXEMPTY is set after the completion of
such delay.
• UNDES: Underrun Error Status (Slave Mode Only)
0 = No underrun has been detected since the last read of SPI_SR.
1 = A transfer begins whereas no data has been loaded in the Transmit Data Register.
• SPIENS: SPI Enable Status
0 = SPI is disabled.
1 = SPI is enabled.
Note:
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10
1. SPI_RCR, SPI_RNCR, SPI_TCR, SPI_TNCR are physically located in the PDC.
(1)
or SPI_TNCR
(1)
and SPI_TNCR
(1)
has a value other than 0.
(1)
have a value of 0.
SAM3N
SAM3N
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