SAM3N0C Atmel Corporation, SAM3N0C Datasheet - Page 478

• Manufacturer Part Number: SAM3N0C
• Manufacturer: Atmel Corporation

Figure 28-19. TWI Read Operation with Single Data Byte and Internal Address
478
478
SAM3N
SAM3N
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
- Internal address size (IADRSZ)
Read Receive Holding register
Set the Master Mode register:
TWI_CR = MSEN + SVDIS
TWI_CR = START | STOP
Read ==> bit MREAD = 1
Set the internal address
Set the Control register:
- Device slave address
TWI_IADR = address
- Transfer direction bit
Read Status register
Read Status register
(Needed only once)
Start the transfer
- Master enable
Yes
TXCOMP = 1?
Set TWI clock
RXRDY = 1?
Yes
BEGIN
END
No
No
11011A–ATARM–04-Oct-10
11011A–ATARM–04-Oct-10