TMP86xy44UG Toshiba, TMP86xy44UG Datasheet - Page 49

• Manufacturer Part Number: TMP86xy44UG
• Manufacturer: Toshiba

Specifications of TMP86xy44UG

• Package: QFP44
• Rom Types (m=mask,p=otp,f=flash): M/P
• Rom Size: 60
• Ram Size: 1K
• Driver Led: 19
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 8
• Da Converter Channels: 1
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 35
• Power Supply (v): 4.5 to 5.5

3.4 Interrupt Sequence
Interrupt
request
Interrupt
latch (IL)
IMF
Execute
instruction
PC
SP
3.4.2 Saving/restoring general-purpose registers
Note 1: a: Return address entry address, b: Entry address, c: Address which RETI instruction is stored
Note 2: On condition that interrupt is enabled, it takes 38/fc [s] or 38/fs [s] at maximum (If the interrupt latch is set at the first
1-machine cycle
Figure 3-1 Timing Chart of Interrupt Acceptance/Return Interrupt Instruction
service program
level of current servicing interrupt is requested.
acceptable interrupt sources are selectively enabled by the individual interrupt enable flags.
before setting IMF to “1”. As for non-maskable interrupt, keep interrupt service shorten compared with length
between interrupt requests; otherwise the status cannot be recovered as non-maskable interrupt would simply
nested.
includes IMF) are automatically saved on the stack, but the accumulator and others are not. These registers are
saved by software if necessary. When multiple interrupt services are nested, it is also necessary to avoid using
the same data memory area for saving registers. The following methods are used to save/restore the general-
purpose registers.
a − 1
Example: Correspondence between vector table address for INTTBT and the entry address of the interrupt
A maskable interrupt is not accepted until the IMF is set to “1” even if the maskable interrupt higher than the
In order to utilize nested interrupt service, the IMF is set to “1” in the interrupt service program. In this case,
To avoid overloaded nesting, clear the individual interrupt enable flag whose interrupt is currently serviced,
During interrupt acceptance processing, the program counter (PC) and the program status word (PSW,
machine cycle on 10 cycle instruction) to start interrupt acceptance processing since its interrupt latch is set.
instruction
Execute
a
FFF2H
FFF3H
a + 1
Vector table address
n
Figure 3-2 Vector table address,Entry address
D2H
03H
Interrupt acceptance
a
n − 1
Vector
n − 2
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b
b + 1
b + 2
instruction
Execute
b + 3
n - 3
D203H
D204H
Entry address
c + 1
Interrupt service task
0FH
06H
n − 2 n − 1
c + 2
Execute RETI instruction
Interrupt
service
program
TMP86CS44UG
a
a + 1
n
a + 2