TMP86xy44UG Toshiba, TMP86xy44UG Datasheet - Page 59

• Manufacturer Part Number: TMP86xy44UG
• Manufacturer: Toshiba

Specifications of TMP86xy44UG

• Package: QFP44
• Rom Types (m=mask,p=otp,f=flash): M/P
• Rom Size: 60
• Ram Size: 1K
• Driver Led: 19
• Driver Lcd: -
• Spi/sio Channels: 1
• Uart/sio Channels: 1
• I2c/sio Channels: -
• High-speed Serial Output: -
• Adc 8-bit Channels: -
• Adc 10-bit Channels: 8
• Da Converter Channels: 1
• Timer Counter 18-bit Channel: -
• Timer Counter 16-bit Channel: 2
• Timer Counter 8-bit Channel: 2
• Motor Channels: -
• Watchdog Timer: Y
• Dual Clock: Y
• Clock Gear: -
• Number Of I/o Ports: 35
• Power Supply (v): 4.5 to 5.5

5.1 Port P0 (P07 to P00)
Read only
(0000H)
(0008H)
P0PRD
and timer/counter input/output.
When used as an output port, the respective P0DR bit should be set data. During reset, the output latch is initialized
to “1”.
ister should be read. P00 port (
INT0EN (bit 6 in EINTCR). During reset, P00 port (
P0DR
R/W
Port P0 is an 8-bit input/output port which is also used as an external interrupt input, serial interface input/output
When used as an input port or a secondary function pins, the respective output latch (P0DR) should be set to “1”.
P0 port output latch (P0DR) and P0 port terminal input (P0PRD) are located on their respective address.
When read the output latch data, the P0DR should be read and when read the terminal input data, the P0PRD reg-
utput latch data (P0DR)
INT4
P07
P07
7
7
Port data (P0PRD)
Control output
Control input
Data output
P06
SCK
P06
6
6
UTEN
ST P
P05
P05
SI
5
5
INT0
P04
P04
SO
) can be configured as either an I/O port or as external interrupt input with
4
4
utput latch
D
Figure 5-2 Port P0
Q
TXD
P03
P03
3
3
Page 48
INT0
RXD
P02
P02
2
2
) is configured as an input port.
PWM4
PDO4
PPG4
P01
TC4
P01
1
1
P00
INT0
P00
0
0
(Initial value: 1111 1111)
P0i
Note: i = 7
TMP86CS44UG
to
0