MSC8102D Motorola / Freescale Semiconductor, MSC8102D Datasheet - Page 2

• Manufacturer Part Number: MSC8102D
• Description: Quad Core 16-Bit Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

Table of Contents
Data Sheet Conventions
ii
Chapter 1
Chapter 2
Chapter 3
Chapter 4
OVERBAR
“asserted”
“deasserted”
Examples:
Note: Values for V
Signal/ Connection Description
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
Specifications
2.1
2.2
2.3
2.4
2.5
2.6
Packaging
3.1
3.2
3.3
3.4
Design Considerations
4.1
4.2
4.3
4.4
4.5
IL
Used to indicate a signal that is active when pulled low (For example, the RESET pin is active when
low.)
Means that a high true (active high) signal is high or that a low true (active low) signal is low
Means that a high true (active high) signal is low or that a low true (active low) signal is high
, V
OL
Features .............................................................................................................................................................. iv
Product Documentation.................................................................................................................................... viii
Power Signals................................................................................................................................................... 1-3
Clock Signals ................................................................................................................................................... 1-3
Reset and Configuration Signals...................................................................................................................... 1-4
Direct Slave Interface, System Bus, and Interrupt Signals .............................................................................. 1-4
Memory Controller Signals............................................................................................................................ 1-12
GPIO, TDM, UART, and Timer Signals ........................................................................................................ 1-14
EOnCE Event and JTAG Test Access Port Signals ....................................................................................... 1-22
Reserved Signals ............................................................................................................................................ 1-22
Introduction ...................................................................................................................................................... 2-1
Maximum Ratings............................................................................................................................................ 2-2
Recommended Operating Conditions .............................................................................................................. 2-3
Thermal Characteristics ................................................................................................................................... 2-3
DC Electrical Characteristics ........................................................................................................................... 2-4
AC Timings ...................................................................................................................................................... 2-5
Pinout and Package Information ...................................................................................................................... 3-1
FC-CBGA (HCTE) Package Description ........................................................................................................ 3-1
FC-CBGA (HCTE) Package Mechanical Drawing ....................................................................................... 3-34
FC-PBGA Package Mechanical Drawing...................................................................................................... 3-35
Thermal Design Considerations....................................................................................................................... 4-1
Power Supply Design Considerations.............................................................................................................. 4-1
Connectivity Guidelines................................................................................................................................... 4-2
Power Considerations....................................................................................................................................... 4-3
Layout Practices ............................................................................................................................................... 4-4
, V
Signal/Symbol
IH
, and V
PIN
PIN
PIN
PIN
OH
are defined by individual product specifications.
Logic State
False
False
True
True
Signal State
Deasserted
Deasserted
Asserted
Asserted
Voltage
V
V
V
V
IH
IH
IL
IL
/V
/V
/V
/V
OL
OH
OH
OL