MSC8102D Motorola / Freescale Semiconductor, MSC8102D Datasheet - Page 43

• Manufacturer Part Number: MSC8102D
• Description: Quad Core 16-Bit Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

2.6.4.2 DMA Data Transfers
Table 2-17 describes the DMA signal timing.
The DREQ
should assert
interaction.
No.
37
38
39
40
41
DREQ setup time before falling edge of REFCLK
DREQ hold time after falling edge of REFCLK
DONE setup time before falling edge of REFCLK
DONE hold time after falling edge of REFCLK
DACK/DRACK/DONE delay after REFCLK rising edge
signal is synchronized with
DREQ
DACK/DONE/DRACK
according to the timings in Table 2-17. Figure 2-4 shows synchronous peripheral
DONE
Characteristic
REFCLK
DREQ
Table 2-17. DMA Signals
Figure 2-4. DMA Signals
REFCLK
39
. To achieve fast response, a synchronized peripheral
41
37
40
Minimum Maximum
0.5
0.5
0.5
6
9
38
—
—
—
—
9
AC Timings
Units
ns
ns
ns
ns
ns
2-13