MSC8102D Motorola / Freescale Semiconductor, MSC8102D Datasheet - Page 22

• Manufacturer Part Number: MSC8102D
• Description: Quad Core 16-Bit Digital Signal Processor
• Manufacturer: Motorola / Freescale Semiconductor

GPIO, TDM, UART, and Timer Signals
1.6 GPIO, TDM, UART, and Timer Signals
1-14
The general-purpose input/output (GPIO), time-division multiplexed (TDM), universal asynchronous
receiver/transmitter (UART), and timer signals are grouped together because they use a common set of
signal lines. Individual assignment of a signal to a specific signal line is configured through internal
registers. Table 1-7 describes the signals in this group.
Signal Name
GPIO0
CHIP_ID0
GPIO1
TIMER0
CHIP_ID1
GPIO2
TIMER1
CHIP_ID2
GPIO3
TDM3TSYN
IRQ1
Output
Output
Output
Output
Output
Output
Output
Type
Input/
Input/
Input/
Input/
Input/
Input/
Input/
Input
Input
Input
Input
Table 1-7. GPIO, TDM, UART, and Timer Signals
General-Purpose Input Output 0
One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two
dedicated outputs.
Chip ID 0
Determines the chip ID of the MSC8102 DSI. It is sampled on the rising edge of PORESET
signal.
General-Purpose Input Output 1
One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two
dedicated outputs.
Timer 0
Each signal is configured as either input to or output from the counter. See the MSC8102
Reference for configuration details.
Chip ID 1
Determines the chip ID of the MSC8102 DSI. It is sampled on the rising edge of PORESET
signal.
General-Purpose Input Output 2
One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two
dedicated outputs. For details, refer to the MSC8102 Reference Manual.
Timer 1
Each signal is configured as either input to or output from the counter. For the
configuration of the pin direction, refer to the MSC8102 Reference Manual.
Chip ID 2
Determines the chip ID of the MSC8102 DSI. It is sampled on the rising edge of PORESET
signal.
General-Purpose Input Output 3
One of 32 GPIO pins used as GPIO or as one of two dedicated inputs or one of two
dedicated outputs. For details, refer to the MSC8102 Reference Manual GPIO programing
model.
TDM3 Transmit Frame Sync
Transmit frame sync for TDM 3.
Interrupt Request 1
One of fifteen external lines that can request a service routine, via the internal interrupt
controller, from the SC140 core.
Description