STG3000X-RIVA128 STMicroelectronics, STG3000X-RIVA128 Datasheet - Page 22

• Manufacturer Part Number: STG3000X-RIVA128
• Description: 128-BIT 3D MULTIMEDIA ACCELERATOR
• Manufacturer: STMicroelectronics

RIVA 128
5.2
The timing specification of the PCI interface takes the form of generic setup, hold and delay times of tran-
sitions to and from the rising edge of PCICLK as shown in Figure 11.
Figure 11. PCI timing parameters
Table 4. PCI timing parameters
NOTE
22/77
Symbol
t
t
t
t
t
t
t
t
VAL
VAL
ON
OFF
SU
SU
SU
H
(PTP)
(PTP)
(PTP)
PCI TIMING SPECIFICATION
1
PCIREQ# and PCIGNT# are point to point signals and have different valid delay and input setup times than bussed sig-
nals. All other signals are bussed.
Input timing parameters
Output timing parameters
PCICLK to signal valid delay (bussed signals)
PCICLK to signal valid delay (point to point)
Float to active delay
Active to float delay
Input set up time to PCICLK (bussed signals)
Input set up time to PCICLK ( PCIGNT# )
Input set up time to PCICLK ( PCIREQ# )
Input hold time from PCICLK
Parameter
Tri-state output
Output delay
PCICLK
PCICLK
Input
128-BIT 3D MULTIMEDIA ACCELERATOR
Min.
10
12
2
2
2
7
0
t
t
ON
VAL
t
SU
t
OFF
Max.
11
12
28
t
H
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Notes
1
1
1
1