STG3000X-RIVA128 STMicroelectronics, STG3000X-RIVA128 Datasheet - Page 71

• Manufacturer Part Number: STG3000X-RIVA128
• Description: 128-BIT 3D MULTIMEDIA ACCELERATOR
• Manufacturer: STMicroelectronics

128-BIT 3D MULTIMEDIA ACCELERATOR
Byte offsets 0x33 - 0x30
Expansion ROM Base Address Register (0x33 - 0x30)
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
31:22
21:11
Bits
10:1
0
0x33
Function
The ROM_BASE_ADDR bits contain the base address of the Expansion
ROM. The bits correspond to the upper bits of the Expansion ROM base
address. This decode permits the PCI boot manager to place the expansion
ROM on a 4MByte boundary. RIVA 128 currently maps a 64KByte BIOS into
the bottom of this 4MByte range. Typically the first 32K of this ROM contains
the VGA BIOS code as well as the PCI BIOS Expansion ROM Header and
Data Structure.
ROM_BASE_RESERVED contain the lower bits of the base address of the
Expansion ROM. These bits are hardwired to 0, forcing a 4MByte boundary.
Reserved
The ROM_DECODE bit indicates whether or not the RIVA 128 accepts
accesses to its expansion ROM. When the bit is set, address decoding is
enabled using the parameters in the other part of the base register. The
MEMORY_SPACE bit (PCI Configuration Register 0x04, page 64) has prece-
dence over the ROM_DECODE bit. RIVA 128 will respond to accesses to its
expansion ROM
ROM_DECODE bit are set to 1.
0=Expansion ROM address space is disabled
1=Expansion ROM address decoding is enabled
only if both the MEMORY_SPACE bit and the
0x32
0x31
9
8
7
6
5
0x30
4
RIVA 128
3
R W X
R W 0
R W I
R - 0
R - 0
2
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1
0