STG3000X-RIVA128 STMicroelectronics, STG3000X-RIVA128 Datasheet - Page 48

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STG3000X-RIVA128

Manufacturer Part Number
STG3000X-RIVA128
Description
128-BIT 3D MULTIMEDIA ACCELERATOR
Manufacturer
STMicroelectronics
Datasheet
RIVA 128
Table 14. ROM interface timing parameters
NOTE
48/77
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
BRCS
BRCA
BRV
BRH
BAS
BAH
BOS
BOH
BWS
BWL
BDBZ
BDS
BDH
BDZ
BWDH
BWDS
1
2
3
T
This param eter is prog rammabl e in the range 0 - 3 MCLK cycles
This param eter is prog rammabl e in the range 0 - 15 MCLK cycles
MCLK
ROMCS# active pulse width
ROMCS# precharge time
Read valid to ROMCS# active
Read hold from ROMCS# inactive
Address setup to ROMCS# active
Address hold from ROMCS# inactive
OE# low from ROMCS# active
OE# low to ROMCS# inactive
WE# low from ROMCS# active
WE# low time
Data bus high-z to ROMCS# active
Data setup to ROMCS# inactive
Data hold from ROMCS# inactive
Data high-z from ROMCS# inactive
Write data hold from ROMCS# inactive
ROM write data setup to ROMCS# active
is the perio d of the internal memory clock.
Parameter
0.5T
20T
128-BIT 3D MULTIMEDIA ACCELERATOR
T
T
T
T
T
T
T
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
MCLK
Min.
MCLK
10
MCLK
0
-5
-5
-5
-5
-5
-5
-5
-5
-5
T
MCLK
Max.
-5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Notes
2
3
2
3

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