STE100A ST Microelectronics, Inc., STE100A Datasheet - Page 19

• Manufacturer Part Number: STE100A
• Description: PCI 10/100 Ethernet Controller with Integrated PHY (3.3v)
• Manufacturer: ST Microelectronics, Inc.

STE10/100A
3.4
Receive scheme and receive early interrupt scheme
The following figure shows the difference of timing without early interrupt and with early
interrupt.
Figure 12. Receive data flow (without early interrupt and with early interrupt)
Figure 13. Detailed receive early interrupt flow
FIFO-to-host memory operation
FIFO-to-host memory operation
Higher layer process (early)
Higher layer process (early)
Driver read header (early)
Driver read header (early)
Driver read the rest data
Driver read the rest data
Receive early interrupt
Driver read the rest data
Receive early interrupt
Receive FIFO operation
Higher layer process
Driver read header
Incoming packet
Interrupt
Time
1st
descriptor
full
Time
The size of 1 st
descriptor is
programmed as the
header size in
advance
: without early interrupt
2 descriptor
Issue 2
interrupt at end
of packet
Functional description
Finish
Finish time
: with early interrupt
Finish time
PC00357
PC00358
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