STE100A ST Microelectronics, Inc., STE100A Datasheet - Page 64

• Manufacturer Part Number: STE100A
• Description: PCI 10/100 Ethernet Controller with Integrated PHY (3.3v)
• Manufacturer: ST Microelectronics, Inc.

Registers and descriptors description
64/82
Table 10.
LH = High Latching and cleared by reading.
XR9(offset = d8h) - XIE, XCVR interrupt enable register
XR10(offset = dch) - 100CTR, 100BASE-TX control register
15,14
15~7
Bit #
13
12
0
6
5
4
3
2
1
0
DISRER
Transceiver registers description (continued)
ANCE
Name
ANAE
PDFE
ANPE
REFE
ANC
REF
RFE
LDE
---
---
Receive error full interrupt.
0: the receive error number is less than 64.
1: 64 error packets is received.
Reserved
Auto-negotiation completed interrupt enable.
0: disable auto-negotiation completed interrupt.
1: enable auto-negotiation complete interrupt.
Remote fault detected interrupt enable.
0: disable remote fault detection interrupt.
1: enable remote fault detection interrupt.
Link down interrupt enable.
0: disable link fail interrupt.
1: enable link fail interrupt.
Auto-negotiation acknowledge interrupt enable.
0: disable link partner acknowledge interrupt
1: enable link partner acknowledge interrupt.
Parallel detection fault interrupt enable.
0: disable fault parallel detection interrupt.
1: enable fault parallel detection interrupt.
Auto-negotiation page received interrupt enable.
0: disable auto-negotiation page received
interrupt.
1: enable auto-negotiation page received
interrupt.
RX_ERR full interrupt enable.
0: disable rx_err full interrupt.
1: enable rx_err interrupt.
Reserved
Disable the RX_ERR counter.
0: the receive error counter - RX_ERR is
enabled.
1: the receive error counter - RX_ERR is
disabled.
Auto-negotiation completed. This bit is the same
as bit 5 of XR1.
0: the auto-negotiation process has not
completed yet.
1: the auto-negotiation process has completed.
Description
Default
0
0
0
0
0
0
0
0
0
0
STE10/100A
RW type
RO/LH*
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO