STE100A ST Microelectronics, Inc., STE100A Datasheet - Page 65

• Manufacturer Part Number: STE100A
• Description: PCI 10/100 Ethernet Controller with Integrated PHY (3.3v)
• Manufacturer: ST Microelectronics, Inc.

STE10/100A
Table 10.
11, 10
Bit #
4~2
9
8
7
6
5
1
0
DISCRM
CMODE
ENDCR
DISMLT
ENRLB
ENRZI
Transceiver registers description (continued)
ISOTX
Name
---
---
Reserved
Enable remote loop-back function.
1: enable remote loop-back (CSR6 bits 11 and
10 must be 00).
Enable DC restoration.
0: disable DC restoration.
1: enable DC restoration.
Enable the conversions between NRZ and NRZI.
0: disable the data conversion between NRZ and
NRZI.
1: enable the data conversion of NRZI to NRZ in
receiving and NRZ to NRZI in transmitting.
Reserved
Transmit Isolation. When 1, isolate from MII and
tx+/-. This bit must be 0 for normal operation
Reports current transceiver operating mode.
Disable MLT3.
0: the MLT3 encoder and decoder are enabled.
1: the MLT3 encoder and decoder are bypassed.
Disable scramble.
0: the scrambler and de-scrambler is enabled.
1: the scrambler and de-scrambler are disabled.
000: in auto-negotiation
001: 10Base-T half duplex
010: 100Base-TX half duplex
011: reserved
100: reserved
101: 10Base-T full duplex
110: 100Base-TX full duplex
111: isolation, auto-negotiation disable
Description
Registers and descriptors description
Default
000
1
0
1
1
0
0
0
RW type
R/W
R/W
R/W
R/W
R/W
R/W
RO
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