STE100A ST Microelectronics, Inc., STE100A Datasheet - Page 70

• Manufacturer Part Number: STE100A
• Description: PCI 10/100 Ethernet Controller with Integrated PHY (3.3v)
• Manufacturer: ST Microelectronics, Inc.

General EEPROM format description
5
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General EEPROM format description
Table 15.
Offset
1F
2A
2E
7E
10
11
12
14
20
22
24
26
28
29
30
E
0
2
3
4
8
F
Length
Connection type definition
0B
4E
2
1
1
4
6
1
1
1
1
2
1
2
2
2
2
1
1
4
2
2
STE10/100A signature: 0x81, 0x09
Format major version: 0x02,
old ROM format version 0x01 is for STE10/100A-MAC only.
Format minor version: 0x00
Reserved
IEEE network address: ID
IEEE ID checksum1:
Sm
SUM=Sm
IEEE ID checksum2:
Reserved, should be zero.
PHY type, 0xFF: Internal PHY (STE10/100A only)
Reserved, should be zero
Default connection type, see Table 15
Reserved, should be zero
Flow control field,
00: Disable flow control function,
01: Enable flow control function.
PCI device ID
PCI vendor ID
PCI subsystem ID
PCI subsystem vendor ID
MIN_GNT value
MAX_LAT value
Cardbus CIS pointer
CSR18 (CR) bit 31-16 recall data
Reserved, should be zero
CheckSum, the least significant two bytes of FCS for data stored in offset
0..7D of EEPROM
0
=0, carry=0
6
where Sm
i
=(Sm
1
, ID
i-1
2
<<1)+(carry from shift)+ID
, ID
Description
3
, ID
4
, ID
5
, ID
6
i
STE10/100A