USB97C100 Standard Microsystems Corporation, USB97C100 Datasheet - Page 34

• Manufacturer Part Number: USB97C100
• Description: USB97C100 Multi-endpoint Usb Peripheral Controller(not Recommended For Designs)
• Manufacturer: Standard Microsystems Corporation

SMSC DS – USB97C100
Notes:
These bits are also visible outside of I/O space in the BUS_STAT register.
These bits are cleared when this register is read through the ISA I/O Window.
BIT
7
6
5
4
3
2
1
0
BIT
7
6
5
4
3
2
1
0
DREQ_SENS
WRITE_TIME
ADDR_HOLD
DACK_SENS
COMP_TIME
MEM2MEM
(ISA 0x0008)
PRIORITY
CTRL_EN
CH_CMD
NAME
(ISA 0x0008)
CH3RQ
CH2RQ
CH1RQ
CH0RQ
CH_STAT
CH3TC
CH2TC
CH1TC
CH0TC
NAME
Table 50 - 8237 Command Register
Table 49 - Channel Status Register
R/W
W
W
W
W
W
W
W
W
R/W
R
R
R
R
R
R
R
R
DACK Sense
0 = Active High
1 = Active Low
DREQ Sense (1 = Active Low, 0 = Active High)
Write Timing Select
0 = Late Timing
1 = Extended
Priority
0 = Fixed
1 = Rotating
Timing
0 = Normal
1 = Compressed
Controller Enable
0 = Enable
1 = Disable
Channel 0 Address Hold
0 = Disable
1 = Hold Enable
Memory-to-Memory
0 = Disable
1 = Enable
Page 34
Channel 3 DMA Request
0 = No Request Pending
1 = Yes Request Pending
Channel 2 DMA Request
0 = No Request Pending
1 = Yes Request Pending
Channel 1 DMA Request
0 = No Request Pending
1 = Yes Request Pending
Channel 0 DMA Request
0 = No Request Pending
1 = Yes Request Pending
Channel 3 Terminal Count Reached
0 = No
1 = Yes
Channel 2 Terminal Count Reached
0 = No
1 = Yes
Channel 1 Terminal Count Reached
0 = No
1 = Yes
Channel 0 Terminal Count Reached
0 = No
1 = Yes
CHANNEL STATUS REGISTER
COMMAND REGISTER
DESCRIPTION
DESCRIPTION
Rev. 01/03/2001