USB97C100 Standard Microsystems Corporation, USB97C100 Datasheet - Page 57

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USB97C100

Manufacturer Part Number
USB97C100
Description
USB97C100 Multi-endpoint Usb Peripheral Controller(not Recommended For Designs)
Manufacturer
Standard Microsystems Corporation
Datasheet
Note:
Note:
SMSC DS – USB97C100
nIOR
SD[x]
nIOW/nIOR
SA[x]
AEN
NAME
Min and Max delays shown for 8051 clk of 24 MHz, to calculate typical timing delays for other clock
frequencies use Oscillator Equations, where t=1/f
NAME
Min and Max delays shown for 8051 clk of 24 MHz, to calculate typical timing delays for other clock
frequencies use Oscillator Equations, where t=1/f
t10
t1
t2
t3
t4
t5
t6
t7
t8
t1
t2
t3
t4
t5
t6
t7
t8
t9
nIOW Asserted to nIOW Deasserted
nIOW Deasserted to SA[x] Invalid
SD[x] Valid to nIOW Deasserted
SD[x] Hold from nIOW Deasserted
nIOW Deasserted to nIOW Asserted
nIOW Deasserted to AEN Deasserted
nIOW Deasserted to SD[x] tri-state
SA[x] and AEN Valid to nIOR Asserted
nIOR Asserted to nIOR Deasserted
nIOR Asserted to SA[x] Invalid
nIOR Asserted to Data Valid
Data Hold/Float from nIOR Deasserted
nIOR Asserted after nIOR Deasserted
nIOR Asserted after nIOW Deasserted
nIOR Asserted to AEN Valid
Data Valid to nIOR Deassereted
nIOR Deasserted to SD[x] tri-state
SA[x] and AEN Valid to nIOW Asserted
DESCRIPTION
DESCRIPTION
Table 89 – 8051 IO Read Timing Parameters
t6
t7
FIGURE 11 – 8051 IO READ CYCLE
Table 88 – 8051 IO WRITE Cycle
t1
Page 57
CLK
CLK
t4
.
.
MIN
106
150
150
DATA VALID
22
22
25
22
MIN
107
150
32
32
32
10
30
32
0
0
t2
MAX
t9
MAX
83
EQUIATION
t5
EQUIATION
6t-100
6t-100
4t-60
t-20
t-20
t-20
6t-100
4t-60
2t
t10
t-10
t-10
t-10
t-10
t8
t3
UNITS
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. 01/03/2001

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