USB97C100 Standard Microsystems Corporation, USB97C100 Datasheet - Page 48

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USB97C100

Manufacturer Part Number
USB97C100
Description
USB97C100 Multi-endpoint Usb Peripheral Controller(not Recommended For Designs)
Manufacturer
Standard Microsystems Corporation
Datasheet
Notes:
SMSC DS – USB97C100
Endpoint numbers used for ALT_ADDRx are the compliment of the actual Endpoint number received. For
example, any packets sent to Endpoint “0” of the ALT_ADDRx will appear as Endpoint 15.
The Firmware (8051) must make sure that endpoint configurations do not overlap.
BIT
BIT
BIT
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
(0x7F99 - RESET=0x00)
(0x7F9E – RESET=0x00)
(0x7F9F – RESET=0x00)
EN_ALTADDR1
EN_ALTADDR 3
EN_ALTADDR2
ALT_ADDR1
ALT_ADDR2
ALT_ADDR3
NAME
ALT6
ALT5
ALT4
ALT3
ALT2
ALT1
ALT0
NAME
NAME
ALT6
ALT5
ALT4
ALT3
ALT2
ALT1
ALT0
ALT6
ALT5
ALT4
ALT3
ALT2
ALT1
ALT0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Table 80 - Alternate Address 1 Register
Table 82 - Alternate Address 3 Register
Table 81- Alternate Address 2 Register
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Alternate address.
1 = Enabled, this bit allows Endpoints 15 through 0 to be
available as Endpoint ALT0 through Endpoint ALT15. In other
words, the SIE can respond to two addresses with up to 32
endpoints distributed between them.
0 = Disabled, this register does not affect EP_OK generation.
Alternate address bit 6
Alternate address bit 5
Alternate address bit 4
Alternate address bit 3
Alternate address bit 2
Alternate address bit 1
Alternate address bit 0
Alternate address 2.
1 = Enabled, this bit allows Endpoints 8 through 11 to be
available to this address.
0 = Disabled, this register does not affect EP_OK
generation.
Alternate address bit 6
Alternate address bit 5
Alternate address bit 4
Alternate address bit 3
Alternate address bit 2
Alternate address bit 1
Alternate address bit 0
Alternate address 3.
1 = Enabled, this bit allows Endpoints 12through 15 to be
available to this address.
0 = Disabled, this register does not affect EP_OK
generation.
Alternate address bit 6
Alternate address bit 5
Alternate address bit 4
Alternate address bit 3
Alternate address bit 2
Alternate address bit 1
Alternate address bit 0
Page 48
ALTERNATE SIE ADDRESS 1
ALTERNATE SIE ADDRESS 2
ALTERNATE SIE ADDRESS 3
DESCRIPTION
DESCRIPTION
DESCRIPTION
Rev. 01/03/2001

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