USB97C100 Standard Microsystems Corporation, USB97C100 Datasheet - Page 35

• Manufacturer Part Number: USB97C100
• Description: USB97C100 Multi-endpoint Usb Peripheral Controller(not Recommended For Designs)
• Manufacturer: Standard Microsystems Corporation

SMSC DS – USB97C100
[7:0]
BIT
[7:3]
[1:0]
BIT
[7:6]
[3:2]
[1:0]
BIT
[7:3]
[1:0]
2
BIT
5
4
2
(ISA 0x000C)
CLEAR_FF
NAME
BPFF
(ISA 0x0009)
SET_CLR
AUTO_INIT
Reserved
(ISA 0x000B)
MODE[1:0]
(ISA 0x000A)
R/WV[1:0]
SEL[1:0]
DMA_MODE
INC_DEC
SET_CLR
SEL[1:0]
CH_REQ
Reserved
NAME
CH_MASK
SEL[1:0]
NAME
NAME
Table 54 - Clear Byte Pointer Flip Flop Register
Table 51 - 8237 Write Single Request Register
Table 52 - 8237 Write Single Mask Register
R/W
W
R/W
Table 53 - Write Mode Register
R/W
W
W
W
R/W
W
W
W
W
W
W
W
R
This register must be written to clear the high/low byte
pointer flip flop prior to reading or writing new address or
word count information to the 8237.
Reserved
Force Internal DMA Request Bit
0 = Clear
1 = Set
'00' = Select Channel 0 DREQ
'01' = Select Channel 1 DREQ
'10' = Select Channel 2 DREQ
'11' = Select Channel 3 DREQ
Reserved
Set Channel Mask Bit
0 = Clear
1 = Set
'00' = Select Channel 0 Mask Bit
'01' = Select Channel 1 Mask Bit
'10' = Select Channel 2 Mask Bit
'11' = Select Channel 3 Mask Bit
'00' = Demand Mode Select
'01' = Single Mode Select
'10' = Block Mode Select
'11' = Cascade Mode Select
Auto-increment/Decrement
0 = Increment
1 = Decrement
Auto-initialization
0 = Disable
1 = Enable
'00' = Verify Transfer
'01' = Write Transfer
'10' = Read Transfer
'11' = Illegal
'XX' if bits 6 and 7 = '11' Or if CH_CMD register bit 0
= 1 (memory-to-memory transfer)
'00' = Select Channel 0
'01' = Select Channel 1
'10' = Select Channel 2
'11' = Select Channel 3
Page 35
CLEAR BYTE POINTER FLIP FLOP
WRITE SINGLE MASK REGISTER
WRITE REQUEST REGISTER
WRITE MODE REGISTER
DESCRIPTION
DESCRIPTION
DESCRIPTION
DESCRIPTION
Rev. 01/03/2001