USB97C100 Standard Microsystems Corporation, USB97C100 Datasheet - Page 61

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USB97C100

Manufacturer Part Number
USB97C100
Description
USB97C100 Multi-endpoint Usb Peripheral Controller(not Recommended For Designs)
Manufacturer
Standard Microsystems Corporation
Datasheet
Note:
SMSC DS – USB97C100
t11
nMEMRD
t1
t2
t3
t4
t7
t8
SD[7:0]
SA[19:0]
FALE
Min and Max delays shown for an 8051 clock of 24MHz, to calculate timing delays for other clock
frequencies use the Oscillator Equations, where T=1/Fclk.
SA[19:0] Valid to nMEMRD asserted
nMEMRD active pulse width
nMEMRD asserted to Data Valid
SD[7:0] data Hold from nMEMRD
deasserted
nMEMRD deasserted to SD[7:0]
data tri-state
FALE deasserted to nMEMRD
asserted
nMEMRD deasserted to SA[19:0]
PARAMETER
Invalid
Table 94 - 8051 Flash Memory Read Timing Parameters
FIGURE 16 - 8051 FLASH MEMORY READ TIMING
t10
t1
t11
21.66
Page 61
MIN
107
150
84
0
0
t4
TYP
DATA VALID
t2
MAX
165
64
OSCILLATOR
EQUATION
t7
3t +/- 40
6t-100
4t-60
2t-20
t-20
t8
t3
UNITS
Rev. 01/03/2001
ns
ns
ns
ns
ns
ns
ns

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