ADSP-21061 Analog Devices, ADSP-21061 Datasheet - Page 2

• Manufacturer Part Number: ADSP-21061
• Description: ADSP-2106x SHARC DSP Microcomputer Family
• Manufacturer: Analog Devices

EZ-ICE is a registered trademark of Analog Devices, Inc.
TABLE OF CONTENTS
GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . 3
ADSP-21000 FAMILY CORE ARCHITECTURE . . . . . . . 4
ADSP-21061 FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . 4
DEVELOPMENT TOOLS . . . . . . . . . . . . . . . . . . . . . . . . . . 8
ADDITIONAL INFORMATION . . . . . . . . . . . . . . . . . . . . . 8
PIN DESCRIPTIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
TARGET BOARD CONNECTOR FOR EZ-ICE
RECOMMENDED OPERATING CONDITIONS (5 V) . 14
ELECTRICAL CHARACTERISTICS (5 V) . . . . . . . . . . . 14
POWER DISSIPATION ADSP-21061 (5 V) . . . . . . . . . . . . 15
RECOMMENDED OPERATING CONDITIONS (3.3 V) 16
ELECTRICAL CHARACTERISTICS (3.3 V) . . . . . . . . . . 16
POWER DISSIPATION ADSP-21061L (3.3 V) . . . . . . . . . 17
ABSOLUTE MAXIMUM RATINGS . . . . . . . . . . . . . . . . 18
TIMING SPECIFICATIONS . . . . . . . . . . . . . . . . . . . . . . . 18
OUTPUT DRIVE CURRENTS . . . . . . . . . . . . . . . . . . . . . 38
POWER DISSIPATION . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
TEST CONDITIONS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
ENVIRONMENTAL CONDITIONS . . . . . . . . . . . . . . . . 41
240-LEAD METRIC MQFP PIN CONFIGURATIONS . . 42
OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . 43, 44
ADSP-21061L 225-Ball Plastic Ball Grid Array (PBGA)
225-Ball Plastic Ball Grid Array (PBGA) Package Pinout . . . . . 46
OUTLINE DIMENSIONS . . . . . . . . . . . . . . . . . . . . . . . . . 47
ORDERING GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
FIGURES
Figure 1. ADSP-21061/ADSP-21061L Block Diagram . . . . 1
Figure 2. ADSP-21061/ADSP-21061L System . . . . . . . . . . . 4
Figure 3. Multiprocessing System . . . . . . . . . . . . . . . . . . . . . 6
Figure 4. ADSP-21061/ADSP-21061L Memory Map . . . . . 7
Figure 5. Target Board Connector For ADSP-21061/
ADSP-21061/ADSP-21061L
PROBE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Package Pinout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Memory Read—Bus Master . . . . . . . . . . . . . . . . . . . . . . . 21
Memory Write—Bus Master . . . . . . . . . . . . . . . . . . . . . . 22
Synchronous Read/Write—Bus Master . . . . . . . . . . . . . . 23
Synchronous Read/Write—Bus Slave . . . . . . . . . . . . . . . . 25
Multiprocessor Bus Request and Host Bus Request . . . . . 26
Asynchronous Read/Write—Host to ADSP-21061 . . . . . . 28
Three-State Timing—Bus Master, Bus Slave,
DMA Handshake . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
JTAG Test Access Port and Emulation . . . . . . . . . . . . . . . 37
HBR, SBTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
®
Figure 6. JTAG Scan Path Connections for Multiple
Figure 7. JTAG Clocktree for Multiple ADSP-21061/
Figure 8. Clock Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 9. Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Figure 10. Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 11. Timer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 12. Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 13. Memory Read—Bus Master . . . . . . . . . . . . . . . . 21
Figure 14. Memory Write—Bus Master . . . . . . . . . . . . . . . 22
Figure 15. Synchronous Read/Write—Bus Master . . . . . . . 24
Figure 16. Synchronous Read/Write—Bus Slave . . . . . . . . . 25
Figure 17. Multiprocessor Bus Request and Host Bus
Figure 18a. Synchronous REDY Timing . . . . . . . . . . . . . . 28
Figure 18b. Asynchronous Read/Write—Host to
Figure 19a. Three-State Timing (Bus Transition Cycle,
Figure 19b. Three-State Timing (Host Transition Cycle) . . 31
Figure 20. DMA Handshake Timing . . . . . . . . . . . . . . . . . 33
Figure 21. Serial Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 22. External Late Frame Sync . . . . . . . . . . . . . . . . . 36
Figure 23. JTAG Test Access Port and Emulation . . . . . . . 37
Figure 24. Output Enable/Disable . . . . . . . . . . . . . . . . . . . 39
Figure 25. Equivalent Device Loading for AC Measurements
Figure 26. Voltage Reference Levels for AC Measurements
Figure 27. ADSP-2106x Typical Drive Currents
Figure 28. Typical Output Rise Time (10%–90% V
Figure 29. Typical Output Rise Time (0.8 V–2.0 V) vs. Load
Figure 30. Typical Output Delay or Hold vs. Load Capacitance
Figure 31. ADSP-2106x Typical Drive Currents
Figure 32. Typical Output Rise Time (10%–90% V
Figure 33. Typical Output Rise Time (0.8 V–2.0 V) vs. Load
Figure 34. Typical Output Delay or Hold vs. Load Capacitance
ADSP-21061L EZ-ICE Emulator (Jumpers in Place) . . . 12
ADSP-21061/ADSP-21061L Systems . . . . . . . . . . . . . . . 12
ADSP-21061L Systems . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Request . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
ADSP-21061/ADSP-21061L . . . . . . . . . . . . . . . . . . . . . . 29
SBTS Assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
(Includes All Fixtures) . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
(Except Output Enable/Disable) . . . . . . . . . . . . . . . . . . . . 39
(V
Load Capacitance (V
Capacitance (V
(at Maximum Case Temperature) (V
(V
Load Capacitance (V
Capacitance (V
(at Maximum Case Temperature) (V
DD
DD
= 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
= 5 V) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
DD
DD
= 5 V) . . . . . . . . . . . . . . . . . . . . . . . . . 40
= 3.3 V) . . . . . . . . . . . . . . . . . . . . . . . 41
DD
DD
= 5 V) . . . . . . . . . . . . . . . . . . . . 40
= 3.3 V) . . . . . . . . . . . . . . . . . . . 40
DD
DD
= 5 V) . . . . . . . . 40
= 3.3 V) . . . . . . . 41
DD
DD
) vs.
) vs.