IDT88P8341 Integrated Device Technology, IDT88P8341 Datasheet - Page 72

• Manufacturer Part Number: IDT88P8341
• Description: Spi Exchange Spi-3 To Spi-4
• Manufacturer: Integrated Device Technology

SPI-4 egress status register (Block_base 0x0700 +
Register_offset 0x02)
TABLE 106 - SPI-4 EGRESS STATUS REGISTER
(REGISTER_OFFSET 0x02)
access.
synchronization.
nization state of the SPI-4 egress data path.
skew state of the SPI-4 egress data path.
state of the SPI-4 egress status channel clock. This function is not available if
SCLK < 0.5 MCLK.
SPI-4 egress calendar configuration register
(Block_base 0x0700 + Register_offset 0x03 - 0x04)
TABLE 107 - SPI-4 EGRESS CALENDAR CONFIGU-
RATION REGISTER (REGISTER_OFFSET 0x03 -
0x04)
0x0300 and has read and write access. The Register_offset for calendar_0 is
0x03. The register offset for calendar_1 is 0x04.
described.
using suitable values for the calendar entries, calendar length and calendar
M. If the adjacent device is unable to configure its calendar to be a multiple of
4, conversion logic may be needed between the adjacent device SPI-4
status signals and the 88P8341 signals.
times the calendar sequence is repeated before a DIP-2 parity and “1 1” framing
words are inserted. The actual calendar_M value used is one more than the
value programmed into the E_CAL_M field.
IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4
E_CAL_M
E_CAL_LEN
E_SYNCH
E_DSK_OOR
SCLK_AV
SPI-4 egress status register
The SPI-4 egress status register is at Block_base 0x0700 and has read-only
The SPI-4 egress status register is used to set the state of the SPI-4 egress
The bit fields of the SPI-4 egress status register are described.
E_SYNCH
E_DSK_OOR
SCLK_AV
The SPI-4 egress calendar configuration registers are at Block_base
The bit fields of the SPI-4 egress calendar configuration register are
The IDT88P8341 calendar length can be programmed to any multiple of 4
E_CAL_M
Field
Field
0=SPI-4 egress data path is out of synchronization
1=SPI-4 egress data path is in synchronization
0=SPI-4 egress data path de-skew is within range
1=SPI-4 egress data path de-skew is out of range
0=SPI-4 egress status channel clock is not available
1=SPI-4 egress status channel clock is available
The E_CAL_M value programmed defines the number of
The SPI-4 egress E_SYNCH field describes the synchro-
The SPI-4 egress SCLK_AV field describes the availability
The SPI-4 egress E_DSK_OOR field describes the de-
RW
RW
Acc
Bits
0
1
2
Bits
13:8
7:0
Length
1
1
1
Length
Value
8
6
Initial Value
0
0
0
0
0x01
Initial
72
the SPI-4 egress calendar. The actual length of the calendar is four times one
more than the value programmed into the E_CAL_LEN field. For example, if
the E_CAL_LEN field is programmed to 0x3F, the actual value used is 0x100.
The calendar length must be at least as large as the number of active SPI-4
egress LPs.
SPI-4 egress diagnostics register (Block_base
0x0700 + Register_offset 0x05)
TABLE 108 - SPI-4 EGRESS DIAGNOSTICS REGIS-
TER (REGISTER_OFFSET 0x05)
+ Register_offset 0x05. The SPI-4 egress diagnostics register has read and
write access.
ous training on the SPI-4 egress status interface.
4 errors on the SPI-4 egress data interface that have been programmed into
the E_DIP_NUM field. After the DIP-4 errors are inserted, the E_ERR_INS field
will clear itself.
SPI-4 egress data interface. The number of errors generated is equal to the
value of the E_DIP_NUM field.
line 0 by the number of bits programmed into the BIT_DELAY field. This may
be used for diagnostics.
SPI-4 egress DIP-2 error counter (Block_base
0x0700 + Register_offset 0x06)
TABLE 109 - SPI-4 EGRESS DIP-2 ERROR
COUNTER (REGISTER_OFFSET 0x06)
0x0700 + Register_offset 0x06. The SPI-2 egress DIP-2 error counter has read
access, and automatically clears itself after a read. The SPI-4 egress DIP-2 error
counter is used in port diagnostics to verify the integrity of the SPI-4 egress status
channel.
the SPI-4 egress status interface. The DIP_2 field saturates at the value
E_FORCE_TRAIN
E_ERR_INS
E_DIP_NUM
BIT_DELAY
E_CAL_LEN The E_CAL_LEN value programmed defines the length of
The SPI-4 egress diagnostics register is addressed from Block_base 0x0700
E_FORCE_TRAIN
E_ERR_INS The E_ERR_INS field is used to insert the number of DIP-
E_DIP_NUM The E_DIP_NUM field is used to create DPI-4 errors on the
BIT_DELAY The BIT_DELAY field is used to delay SPI-4 egress data bit
The SPI-4 egress DIP-2 error counter is addressed from Block_base
DIP_2 The DIP_2 field is used to read the number of DIP-2 errors seen on
Field
Field
DIP_2
0=Normal status channel operation
1=Force continuous training on the SPI-4 egress status interface
0=Normal status channel operation
1= Insert DIP-4 errors on the SPI-4 egress data interface
The E_FORCE_TRAIN field is used to force continu-
Bits
15:0
Bits
5:2
7:6
0
1
INDUSTRIAL TEMPERATURE RANGE
Length
16
Length
Value
1
1
4
2
APRIL 10, 2006
Initial Value
Initial
0
0
0
0
0