MC72000 Freescale Semiconductor, MC72000 Datasheet - Page 55

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MC72000

Manufacturer Part Number
MC72000
Description
Integrated Bluetooth Radio
Manufacturer
Freescale Semiconductor
Datasheet
RST
RST
W
W
R
R
be asserted as well and an interrupt is posted (if MRXR = 0). The RXRDY interrupt flag is cleared when
the RXFIFO empties below the programmed trigger level.
7.2.4.5 Receiving a Break Condition
Receiving a break condition is detecting all zeros including a zero during the stop bit bit time. When a break
condition is detected by the receiver, the UART will interpret this as a framing error.
7.2.4.6 Voting Logic
The vote logic block provides jitter tolerance and noise immunity by sampling with respect to the peripheral
clock and using voting techniques to clean up the samples. The voting is implemented by sampling the
incoming signal constantly on the rising edge of clock. The receiver is provided with the majority vote
value, which is two out of the three samples.
The vote logic captures a sample on every rising edge of the clock, but the receiver takes its value in the
middle of the sample frame using 16x oversampling. The idle character may be longer or shorter than 16
counts, but the receiver looks for a 1 to 0 transition. Then it starts to count the start bit but does not capture
it in the FIFO. The start bit is validated upon receiving zeros for seven consecutive bit times following the
1 to 0 transition. Once the counter reaches F hex, it starts counting the next bit and captures it in the middle
of the sampling frame. All data bits are captured in the same manner. Once the stop bit is detected, the
receiver shift register data is parallel shifted to the receiver FIFO.
7.2.5 UART Registers
The following paragraphs provide detailed descriptions of UART registers.
7.2.5.1 UART Control Register (UCON)
UCON is used to specify transmission parameters, such as flow control, stop bits, parity, and so on.
TST—Test Loop-Back:
MOTOROLA
This bit sets whether the MC72000 is placed into test loop-back mode where the TXD and RXD signals
are connected.
TST
31
15
0
0
0
MRX
= writes have no effect and terminate without transfer error exception
30
14
R
0
0
1
MTXR FCE
29
13
0
0
1
28
12
0
0
0
Freescale Semiconductor, Inc.
FCP
27
11
0
0
0
For More Information On This Product,
MC72000 Advance Information Data Sheet
XTIM
26
10
Table 27. Majority Vote Results
0
0
0
Go to: www.freescale.com
SEL
25
0
0
9
0
Samples
UCONBase + $000
000
101
001
111
Preliminary
24
0
0
8
0
0
TX_OEN_
23
B
0
0
7
1
Vote
0
1
0
1
CONT
22
X
0
0
6
0
Hardware Functional Description
SB
21
0
0
5
0
ST2
20
0
0
4
0
EP
19
0
0
3
0
PEN
18
0
0
2
0
RXE
17
0
0
1
0
55
TXE
16
0
0
0
0

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