DSP56364D Motorola Inc, DSP56364D Datasheet - Page 3
![no-image](/images/no-image-200.jpg)
DSP56364D
Manufacturer Part Number
DSP56364D
Description
24-Bit Audio Digital Signal Processor
Manufacturer
Motorola Inc
Datasheet
1.DSP56364D.pdf
(162 pages)
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1.2
1.3
1.4
1.5
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Table 1
design properly with the part. Documentation is available from a local Motorola distributor, a Motorola
semiconductor sales office, a Motorola Literature Distribution Center, or through the Motorola DSP home
page on the Internet (the source for the latest information).
MOTOROLA
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lists the documents that provide a complete description of the DSP56364 and are required to
JTAG port.
Very low-power CMOS design, fully static design with operating frequencies down to DC.
STOP and WAIT low-power standby modes.
1.5Kx24 Bit Y-Data RAM.
1Kx24 Bit X-Data RAM.
8Kx24 Bit Program ROM.
0.5Kx24 Bit Program RAM and 192x24 Bit Bootstrap ROM.
0.75Kx24 Bit from Y Data RAM can be switched to Program RAM resulting in up to 1.25Kx24 Bit of
Program RAM.
External Memory Expansion Port with 8-bit data bus.
Off-chip expansion up to 2 x 16M x 8-bit word of Data/Program memory when using DRAM.
Off-chip expansion up to 2 x 256k x 8-bit word of Data/Program memory when using SRAM.
Simultaneous glueless interface to SRAM and DRAM.
Enhanced Serial Audio Interface (ESAI): 6 serial lines, 4 selectable as receive or transmitt and 2
transmitt only, master or slave. I
Unused pins of ESAI may be used as GPIO lines.
Serial Host Interface (SHI): SPI and I
24-bit words.
Four dedicated GPIO lines.
100-pin plastic TQFP package.
On-chip Memory Configuration
Off-chip memory expansion
Peripheral modules
Packaging
Documentation
Freescale Semiconductor, Inc.
For More Information On This Product,
DSP56364 Advance Information
Go to: www.freescale.com
2
S, Sony, AC97, network and other programmable protocols.
2
C protocols, 10-word receive FIFO, support for 8, 16 and
Documentation
Overview
3
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