DSP56364D Motorola Inc, DSP56364D Datasheet - Page 66

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DSP56364D

Manufacturer Part Number
DSP56364D
Description
24-Bit Audio Digital Signal Processor
Manufacturer
Motorola Inc
Datasheet
140
143
144
Specifications
Serial Host Interface SPI Protocol Timing
2.11
No.
141
142
2-46
Tolerable spike width on clock or
data in
Minimum serial clock cycle =
t
Serial clock high period
Serial clock low period
Serial clock rise/fall time
SPICC
SERIAL HOST INTERFACE SPI PROTOCOL TIMING
(min)
Characteristics
Table 2-17 Serial Host Interface SPI Protocol Timing
Freescale Semiconductor, Inc.
For More Information On This Product,
DSP56364 Advance Information
Go to: www.freescale.com
Master Bypassed
Master Bypassed
Master Bypassed
Master
Mode
Slave
Slave
Slave
Bypassed
Bypassed
Bypassed
Narrow
Narrow
Narrow
Narrow
Narrow
Narrow
Mode
Filter
Wide
Wide
Wide
Wide
Wide
Wide
0.5 t
0.5 t
0.5 t
0.5 t
0.5 t
0.5 t
2.5 T
2.5 T
2.5 T
2.5 T
Expression
2.5 T
2.5 T
6 T
6 T
6 T
SPICC
SPICC
SPICC
SPICC
SPICC
SPICC
C
C
C
C
C
C
C
+152
+223
C
C
+46
+102
+189
+102
+189
+12
+12
–10
–10
–10
–10
–10
–10
Min
106
212
283
131
127
214
131
127
214
43
96
37
43
96
37
MOTOROLA
2000
Max
100
50
10
0
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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