DSP56364D Motorola Inc, DSP56364D Datasheet - Page 32

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DSP56364D

Manufacturer Part Number
DSP56364D
Description
24-Bit Audio Digital Signal Processor
Manufacturer
Motorola Inc
Datasheet
No.
Specifications
Reset, Stop, Mode Select, and Interrupt Timing
2-12
5.
6.
7.
8.
9.
For an external clock generator, RESET duration is measured during the time in which RESET is asserted,
V
For internal oscillator, RESET duration is measured during the time in which RESET is asserted and V
valid. The specified timing reflects the crystal oscillator stabilization time after power-up. This number is
affected both by the specifications of the crystal and other components connected to the oscillator and
reflects worst case conditions.
When the V
been yet met, the device circuitry will be in an uninitialized state that can result in significant power
consumption and heat-up. Designs should minimize this state to the shortest possible duration.
If PLL does not lose lock
V
WS = number of wait states (measured in clock cycles, number of T
Use expression to compute maximum value.
Table 2-7 Reset, Stop, Mode Select, and Interrupt Timing
CC
CC
is valid, and the EXTAL input is active and valid.
= 3.3 V
A0–A17
RESET
All Pins
Characteristics
CC
0.16 V; T
is valid, but the other “required RESET duration” conditions (as specified above) have not
Freescale Semiconductor, Inc.
For More Information On This Product,
8
J
= 0°C to + 105°C, C
DSP56364 Advance Information
Figure 2-2 Reset Timing
Go to: www.freescale.com
Reset Value
L
= 50 pF
9
Expression
C
)
6
(continued)
10
First Fetch
Min
V
MOTOROLA
IH
Max
AA0460
Unit
CC
is

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