DSP56364D Motorola Inc, DSP56364D Datasheet - Page 83
![no-image](/images/no-image-200.jpg)
DSP56364D
Manufacturer Part Number
DSP56364D
Description
24-Bit Audio Digital Signal Processor
Manufacturer
Motorola Inc
Datasheet
1.DSP56364D.pdf
(162 pages)
- Current page: 83 of 162
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2.15
MOTOROLA
Notes:
500 TCK frequency of operation (1/(T
501 TCK cycle time in Crystal mode
502 TCK clock pulse width measured at 1.5 V
503 TCK rise and fall times
504 Boundary scan input data setup time
505 Boundary scan input data hold time
506 TCK low to output data valid
507 TCK low to output high impedance
508 TMS, TDI data setup time
509 TMS, TDI data hold time
510 TCK low to TDO data valid
511 TCK low to TDO high impedance
No.
(Input)
1.
2.
JTAG TIMING
TCK
V
All timings apply to OnCE module data transfers because it uses the JTAG port as an interface.
CC
= 3.3 V
0.16 V; T
Figure 2-28 Test Clock Input Timing Diagram
Freescale Semiconductor, Inc.
503
For More Information On This Product,
Characteristics
VIH
J
= 0°C to +105°C, C
DSP56364 Advance Information
Table 2-22 JTAG Timing
Go to: www.freescale.com
C
VIL
3); maximum 22 MHz)
502
VM
L
= 50 pF
501
503
502
VM
45.0
20.0
24.0
25.0
Min
All frequencies
0.0
0.0
0.0
5.0
0.0
5.0
0.0
0.0
Max
22.0
40.0
40.0
44.0
44.0
3.0
—
—
—
—
—
—
Specifications
JTAG Timing
AA0496
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2-63
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