LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 323

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LM3S317-IQN20-A0T

Manufacturer Part Number
LM3S317-IQN20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
15.4
Table 15-1. PWM Register Map (Sheet 1 of 2)
May 4, 2007
PWM Module Control
PWM Generator 0
Offset
0x00C
0x01C
0x04C
0x000
0x004
0x008
0x010
0x014
0x018
0x020
0x040
0x044
0x048
0x050
Name
PWMCTL
PWMSYNC
PWMENABLE
PWMINVERT
PWMFAULT
PWMINTEN
PWMRIS
PWMISC
PWMSTATUS
PWM0CTL
PWM0INTEN
PWM0RIS
PWM0ISC
PWM0LOAD
5.
6.
7.
8.
9.
Register Map
Table 15-2 lists the PWM registers. The offset listed is a hexadecimal increment to the register’s
address, relative to the PWM base address of 0x40028000.
Set the period. For a 25-KHz frequency, the period = 1/25,000, or 40 microseconds. The PWM
clock source is 10 MHz; the system clock divided by 2. This translates to 400 clock ticks per
period. Use this value to set the PWM0LOAD register. In Count-Down mode, set the LOAD
field in the PWM0LOAD register to the requested period minus one.
Set the pulse width of the PWM0 pin for a 25% duty cycle.
Set the pulse width of the PWM1 pin for a 75% duty cycle.
Start the timers in PWM generator 0.
Enable PWM outputs.
Write the PWM0LOAD register with a value of 0x0000018F.
Write the PWM0CMPA register with a value of 0x0000012B.
Write the PWM0CMPB register with a value of 0x00000063.
Write the PWM0CTL register with a value of 0x00000001.
Write the PWMENABLE register with a value of 0x00000003.
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
0x00000000
Reset
R/W1C
R/W1C
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
Preliminary
Description
Master control of the PWM module
Counter synchronization for the PWM generators
Master enable for the PWM output pins
Inversion control for the PWM output pins
Fault handling for the PWM output pins
Interrupt enable
Raw interrupt status
Interrupt status and clear
Value of the Fault input signal
Master control of the PWM0 generator block
Interrupt enable
Raw interrupt status
Interrupt status and clear
Load value for the counter
LM3S317 Data Sheet
page
See
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