LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 331

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LM3S317-IQN20-A0T

Manufacturer Part Number
LM3S317-IQN20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
LM3S317 Data Sheet
Register 7: PWM Raw Interrupt Status (PWMRIS), offset 0x018
This register provides the current set of interrupt sources that are asserted, regardless of whether
they cause an interrupt to be asserted to the controller. The fault interrupt is latched on detection; it
must be cleared through the PWM Interrupt Status and Clear (PWMISC) register (see
page 332). The PWM generator interrupts simply reflect the status of the PWM generator; they are
cleared via the interrupt status register in the PWM generator block. Bits set to 1 indicate the
events that are active; a zero bit indicates that the event in question is not active.
May 4, 2007
331
Preliminary

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