LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 335

• Manufacturer Part Number: LM3S317-IQN20-A0T
• Description: Microcontroller
• Manufacturer: Luminary Micro, Inc.

May 4, 2007
Bit/Field
31:
5
4
3
2
1
0
Register 11: PWM0 Interrupt Enable (PWM0INTEN), offset 0x044
These registers control the interrupt generation capabilities of the PWM generator. The events that
can cause an interrupt are:
Any combination of these events can generate either an interrupt.
IntCntLoad
IntCntZero
IntCmpBD
IntCmpBU
IntCmpAD
IntCmpAU
The counter being equal to the load register
The counter being equal to zero
The counter being equal to the comparator A register while counting up
The counter being equal to the comparator A register while counting down
The counter being equal to the comparator B register while counting up
The counter being equal to the comparator B register while counting down
reserved
Name
Type
R/W
R/W
R/W
R/W
R/W
R/W
RO
Reset
0
0
0
0
0
0
0
Preliminary
Description
never be changed.
When 1, an interrupt occurs when the counter matches the
comparator B value and the counter is counting down.
When 1, an interrupt occurs when the counter matches the
comparator B value and the counter is counting up.
When 1, an interrupt occurs when the counter matches the
comparator A value and the counter is counting down.
When 1, an interrupt occurs when the counter matches the
comparator A value and the counter is counting up.
When 1, an interrupt occurs when the counter matches the
PWMnLOAD register.
When 1, an interrupt occurs when the counter is 0.
Reserved bits return an indeterminate value, and should
LM3S317 Data Sheet
335