LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 76

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LM3S317-IQN20-A0T

Manufacturer Part Number
LM3S317-IQN20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
System Control
76
Reset
Reset
Type
Type
Bit/Field
31:25
23:19
15:5
Software Reset Control 1 (SRCR1)
Offset 0x044
3:1
24
18
17
16
4
0
RO
RO
31
15
0
0
Register 11: Software Reset Control 1 (SRCR1), offset 0x044
Writes to this register are masked by the bits in the Device Capabilities 2 (DC2) register (see
page 69).
RO
RO
30
14
0
0
reserved
reserved
reserved
reserved
COMP0
GPTM2
GPTM1
GPTM0
UART0
Name
SSI
RO
RO
29
13
0
0
reserved
RO
RO
28
12
0
0
Type
R/W
R/W
R/W
R/W
R/W
R/W
RO
RO
RO
RO
RO
RO
27
11
0
0
reserved
RO
RO
26
10
0
0
Reset
RO
RO
25
0
9
0
0
0
0
0
0
0
0
0
0
0
Preliminary
COMP0
R/W
RO
24
0
8
0
Description
Reserved bits return an indeterminate value, and should
never be changed.
Reset control for analog comparator 0.
Reserved bits return an indeterminate value, and should
never be changed.
Reset control for General-Purpose Timer module 2.
Reset control for General-Purpose Timer module 1.
Reset control for General-Purpose Timer module 0.
Reserved bits return an indeterminate value, and should
never be changed.
Reset control for the SSI units.
Reserved bits return an indeterminate value, and should
never be changed.
Reset control for the UART0 module.
RO
RO
23
0
7
0
RO
RO
22
0
6
0
reserved
RO
RO
21
0
5
0
SSI
R/W
RO
20
0
4
0
RO
RO
19
0
3
0
GPTM2
reserved
R/W
RO
18
0
2
0
GPTM1 GPTM0
R/W
RO
17
May 4, 2007
0
1
0
UART0
R/W
R/W
16
0
0
0

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