LM3S317-IQN20-A0T Luminary Micro, Inc., LM3S317-IQN20-A0T Datasheet - Page 325

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LM3S317-IQN20-A0T

Manufacturer Part Number
LM3S317-IQN20-A0T
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet
May 4, 2007
Bit/Field
31:
0
Register 1: PWM Master Control (PWMCTL), offset 0x000
This register provides master control over the PWM generation block.
GlobalSync0
reserved
Name
Type
R/W
RO
Reset
0
0
Preliminary
Description
never be changed.
Setting this bit causes any queued update to a load or
comparator register in PWM generator 0 to be applied the
next time the corresponding counter becomes zero. This bit
automatically clears when the updates have completed; it
cannot be cleared by software.
Reserved bits return an indeterminate value, and should
LM3S317 Data Sheet
325

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