AN1154 STMicroelectronics, AN1154 Datasheet - Page 72

• Manufacturer Part Number: AN1154
• Description: 8031-PSD DESIGN TUTORIAL
• Manufacturer: STMicroelectronics

AN1154 - APPLICATION NOTE
Trim
: OUTPUT;-- True when the measured level is greater than the desired one
Boost : OUTPUT;-- Opposite of Trim
-- The chip select output for the RTC (U5):
RTC_CS~: OUTPUT;
-- This signals are to/from the ADC (U7):
Start_Conversn: OUTPUT; -- Indicates when the ADC should start its analog-to-
digital conversion
ADC_Out[3..0]: INPUT; -- The measured signal strength
-- The bus is used to set the gain on the PGA (part of U8)
PGA_Din[2..0]: OUTPUT;
-- The following are outputs to the external memories:
-- Chip selects
FLASH_CS~: OUTPUT;
EEPROM_CS~: OUTPUT;
SRAM_CS~: OUTPUT;
-- Output enables
FLASH_OE~: OUTPUT;
EEPROM_OE~: OUTPUT;
SRAM_OE~: OUTPUT;
-- Upper address bits
FLASH_A[16..14]: OUTPUT;-- MS addr bits for the 128K FLASH - for segmentation
EEPROM_A[14..13]: OUTPUT;-- MS addr bits for the 32K EEPROM - for segmentation
-- Latched/demultiplexed address output
Addr_Out[7..0]: OUTPUT;-- outputs to the external memories
-- Control Output for MCU I/O mode
Control[2..0]: OUTPUT;
)
VARIABLE
A/D[7..0] : TRI;-- Needed to drive the data output onto the data bus
la[7..0] : LATCH;-- Must demux lower byte of addr
page_reg[7..0]: DFFE;-- Page register
vm_reg[7..0]: DFFE; -- Used for memory mapping in combined memory space mode
desired_reg[3..0]: DFFE;-- Register to store the desired signal level (set by the
MCU)
gain_reg[2..0]: DFFE; -- Register to store the gain level (set by the MCU)
begin_comparrison: DFFE; -- takes state machine out of idle state (s0)
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