AN1154 STMicroelectronics, AN1154 Datasheet - Page 73

• Manufacturer Part Number: AN1154
• Description: 8031-PSD DESIGN TUTORIAL
• Manufacturer: STMicroelectronics

cntrl_port_reg[2..0]: DFFE;-- MCU I/O mode control register
addr[15..0]: NODE;-- Demultiplexed addr
fs[7..0] : NODE;-- FLASH segment enable signals
ees[3..0] : NODE; -- EEPROM segment enable signals
swap
enable_data_half: NODE;-- bit 6 of the page register
measured[3..0]: NODE;-- Output from the ADC
desired[3..0]: NODE;-- Input from the MCU
meqd
sm
BEGIN
-- Right now, there is nothing to output to the MCU on the A/D lines
-- Latch in the addr[]
A/D[] = GND;
la[] = A/D[];
la[].ena = ALE;
addr[7..0] = la[];
addr[15..8] = A[];
Addr_Out[] = la[];
begin_comparrison = A/D7;
begin_comparrison.clk = Clock;
begin_comparrison.clrn = Reset~;
begin_comparrison.ena = !WR~ & (addr[] == START_SIG_ADDR);
desired_reg[] = A/D[7..4];
desired_reg[].clk = Clock;
desired_reg[].clrn = Reset~;
desired_reg[].ena = !WR~ & (addr[] == DESIRED_REG_ADDR);
gain_reg[] = A/D[2..0];
gain_reg[].clk = Clock;
gain_reg[].clrn = Reset~;
gain_reg[].ena = !WR~ & (addr[] == GAIN_REG_ADDR);
cntrl_port_reg[] = A/D[2..0];
cntrl_port_reg[].clk = Clock;
cntrl_port_reg[].clrn = Reset~;
cntrl_port_reg[].ena = !WR~ & (addr[] == MCU_IO_OUT_ADDR);
page_reg[] = A/D[];
: NODE; -- bit 7 of the page register
: NODE;-- True when the measured value equals the desired one
: MACHINE WITH STATES (s0, s1, s2, s3);
AN1154 - APPLICATION NOTE
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