FDC37B77X SMSC Corporation, FDC37B77X Datasheet - Page 138

• Manufacturer Part Number: FDC37B77X
• Description: ENHANCED SUPER I/O CONTROLLER WITH WAKE UP FEATURES
• Manufacturer: SMSC Corporation

Note 1: CR22 Bit 5 and Bit 7 are reset by VTR POR, only.
PowerControl
Default = 0x00.
on Vcc POR or
Reset_Drv hardware
signal
Power Mgmt
Default = 0x00.
on Vcc POR or
Reset_Drv hardware
signal
REGISTER
ADDRESS
0x22 R/W
0x23 R/W
Table 53 - Chip Level Registers
Bit[0] FDC Power
Bit[1] Reserved
Bit[2] Reserved
Bit[3] Parallel Port Power
Bit[4] Serial Port 1 Power
Bit[5] Serial Port 2 Power (Note 1)
Bit[6] Reserved
Bit[7] PME Power (Note 1)
= 0
= 1
Bit[0] FDC
Bit[1] Reserved
Bit[2] Reserved
Bit[3] Parallel Port
Bit[4] Serial Port 1
Bit[5] Serial Port 2
Bit[6:7] Reserved (read as 0)
= 0
= 1
Trickle Clock Inactive (default)
Trickle Clock Running. PLL selected by
internal PWRGOOD signal.
Intelligent Pwr Mgmt off
Intelligent Pwr Mgmt on
138
DESCRIPTION
STATE
C
C