FDC37B77X SMSC Corporation, FDC37B77X Datasheet - Page 14

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FDC37B77X

Manufacturer Part Number
FDC37B77X
Description
ENHANCED SUPER I/O CONTROLLER WITH WAKE UP FEATURES
Manufacturer
SMSC Corporation
Datasheet
STATUS REGISTER A (SRA)
Address 3F0 READ ONLY
This register is read-only and monitors the state
of the FINTR
PS/2 Mode
BIT 0 DIRECTION
Active high status indicating the direction of
head movement. A logic "1" indicates inward
direction; a logic "0" indicates outward direction.
BIT 1 nWRITE PROTECT
Active low status of the WRITE PROTECT disk
interface input. A logic "0" indicates that the disk
is write protected.
BIT 2 nINDEX
Active low status of the INDEX disk interface
input.
BIT 3 HEAD SELECT
Active high status of the HDSEL disk interface
input. A logic "1" selects side 1 and a logic "0"
selects side 0.
RESET
COND.
pin
PENDING
INT
7
0
and
nDRV2
several
6
1
STEP
disk
5
0
14
nTRK0 HDSEL nINDX
N/A
interface pins in PS/2 and Model 30 modes. The
SRA can be accessed at any time when in PS/2
mode. In the PC/AT mode the data bus pins D0
- D7 are held in a high impedance state for a
read of address 3F0.
BIT 4 nTRACK 0
Active low status of the TRK0 disk interface
input.
BIT 5 STEP
Active high status of the STEP output disk
interface output pin.
BIT 6 nDRV2
Active low status of the DRV2 disk interface
input pin, indicating that a second drive has
been installed.
supported in the FDC37B77x.
BIT 7 INTERRUPT PENDING
Active high bit indicating the state of the Floppy
Disk Interrupt output.
4
3
0
N/A
2
Note:
nWP
N/A
1
This function is not
DIR
0
0

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