SPC5561MZQ132 Freescale Semiconductor / Motorola, SPC5561MZQ132 Datasheet - Page 12

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SPC5561MZQ132

Manufacturer Part Number
SPC5561MZQ132
Description
Power Architecture TM 32-bit MCU for Automotive
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Electrical Characteristics
therefore cannot read the default state when POR negates. V
pin (V
applies during power up only. V
3.7.2
The 1.5 V V
power supply rises above 2.0 V. This ensures that digital logic in the PLL for the 1.5 V power supply does
not begin to operate below the specified operation range lower limit of 1.35 V. Because the internal 1.5 V
POR is disabled, the internal 3.3 V POR or the RESET power POR must hold the device in reset. Since
they can negate as low as 2.0 V, V
POR negate.
3.7.3
The only requirement for the power-down sequence with V
its operating range, V
increases to its operating range. This ensures that the digital 1.5 V logic, which is reset only by an ORed
POR and can cause the 1.5 V supply to decrease less than its specification value, resets correctly.
12
DDEH6
Power-Up Sequence (V
Power-Down Sequence (V
DD
), but cannot lag both by more than the V
power supply must rise to 1.35 V before the 3.3 V V
V
DD
2.0 V
must reach 1.35 V before V
DDSYN
Figure 2. Power-Up Sequence (V
or the RESET power must decrease to less than 2.0 V before the V
DD33
MPC5561 Microcontroller Data Sheet, Rev. 2.0
DD
1.35 V
has no lead or lag requirements when powering down.
must be within specification before the 3.3 V POR and the RESET
DDSYN
RC33
RC33
and the RESET power reach 2.0 V
Grounded)
DD33
Grounded)
lag specification. This V
RC33
DD33
RC33
grounded is if V
Grounded)
V
can lag V
DDSYN
DDSYN
and RESET Power
power supply and the RESET
DDSYN
V
DD
DD
DD33
or the RESET power
decreases to less than
Freescale Semiconductor
lag specification
DD
power

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