SPC5561MZQ132 Freescale Semiconductor / Motorola, SPC5561MZQ132 Datasheet - Page 50

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SPC5561MZQ132

Manufacturer Part Number
SPC5561MZQ132
Description
Power Architecture TM 32-bit MCU for Automotive
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Revision History for the MPC5561 Data Sheet
50
Table 7
Table 8
Table 9
Location
Power Sequence Pin Status for Fast Pads
Power Sequence Pin Status for Medium/Slow Pads:
DC Electrical Specifications:
• Changed title to Pin Status for Fast Pads During the Power Sequence
• Changed preceding paragraph
• Deleted the ‘Comment’ column.
• Added a POR column after the V
• Added row 2:’ V
• Changed title to Pin Status for Medium and Slow Pads During the Power Sequence
• Updated preceding paragraph.
• Deleted the ‘Comment’ column.
• Added a POR column after the V
• Added row 3:’ V
• Spelled out meaning of the slash ‘/’ as ‘and’ as well as ‘I/O’ as ‘input/output.’ Sentence still very confusing.
• Spec 20, column 2, Characteristics,’ Slow and medium output high voltage (I
• Spec 20, column 4, Min.: Added a blank line before and after ‘0.80 × V
• Spec 22, column 2,’Slow and medium output low voltage (I
• Spec 22, column 5, Max.: Added a blank line before and after ‘0.20 × V
• Spec 26: Changed ‘AN[12]_MA[1]_SDO’ to ‘AN[13]_MA[1]_SDO’.
• Spec 27a: Changed 132 MHz to 135 MHz. Added maximum values for 8-way cache:
• Spec 27b, Operating current 1.5 V supplies @ 114 MHz: Added maximum values for 8-way cache:
Deleted ‘input/output’ from the specs to improve clarity.
Created a left-justified second line and moved ‘I
the parentheses. Created a left-justified third line that reads ‘I
line.
and moved ‘I
left-justified third line that reads ‘I
line.
current spikes, etc., the state of the I/O pins during power up/down varies depending on power. Prior to exiting
POR, the pads are in a high impedance state (Hi-Z).
To: There are no power up/down sequencing requirements to prevent issues such as latch-up, excessive current
spikes, and so on. Therefore, the state of the I/O pins during power up/down varies depending on which supplies
are powered.
From: Although there are no power up/down sequencing requirements to prevent issues like latch-up, excessive
1.65 typical = 630
1.35 typical = 500
1.65 high = 785
1.35 high = 630
All 8-way cache max values have footnote 11.
Added 4-way cache with footnote 10:
1.65 high = 685 with footnote 11
1.35 high = TBD with footnote 12
1.65 typical = 600,
1.35 typical = 450,
1.65 high = 680,
1.35 high = 500.
All 8-way cache max values have footnote 11.
Added 4-way cache with footnote 10:
1.65 and 1.35 high = TBD with footnote 12
Table 28. Table and Figure Changes Between Rev. 0.0 and 1.0 (continued)
OL_S
DDE
DDEH
= 2.0 mA.’ from the 1st line to the second line and deleted the parentheses. Created a
, Low, Low, Asserted, High’ and row 5: V
, V
MPC5561 Microcontroller Data Sheet, Rev. 2.0
DD
, Asserted, Hi-Z.’
DD
DD
OL_S
column.
column.
= 1.0 mA.’
Description of Changes
OH_S
= –2.0 mA’ from the 1st line to the second line and deleted
OL_S
DDE
OH_S
= 2.0 mA):’ Created a left-justified second line
, V
= –1.0 mA.’
DD33
DDEH
DDEH
, V
DD
’ and put ‘0.85 × V
’ and put ‘0.15 × V
OH_S
, Asserted, Hi-Z.
= –2.0 mA):’
Freescale Semiconductor
DDEH
DDEH
’ on the last
’ on the last

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